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Commit 1410a90a authored by Max Gurtovoy's avatar Max Gurtovoy Committed by Doug Ledford
Browse files

net/mlx5: Define interface bits for fencing UMR wqe 



HW can implement UMR wqe re-transmission in various ways.
Thus, add HCA cap to distinguish the needed fence for UMR to make
sure that the wqe wouldn't fail on mkey checks.

Signed-off-by: default avatarMax Gurtovoy <maxg@mellanox.com>
Acked-by: default avatarLeon Romanovsky <leon@kernel.org>
Reviewed-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent eed76245

include/linux/mlx5/mlx5_ifc.h

+9 −1
Original line number Original line Diff line number Diff line
@@ -766,6 +766,12 @@ enum { 
	MLX5_CAP_PORT_TYPE_ETH = 0x1,

	MLX5_CAP_PORT_TYPE_ETH = 0x1,

};

};





enum {

	MLX5_CAP_UMR_FENCE_STRONG	= 0x0,

	MLX5_CAP_UMR_FENCE_SMALL	= 0x1,

	MLX5_CAP_UMR_FENCE_NONE		= 0x2,

};



struct mlx5_ifc_cmd_hca_cap_bits {

struct mlx5_ifc_cmd_hca_cap_bits {

	u8         reserved_at_0[0x80];

	u8         reserved_at_0[0x80];
@@ -875,7 +881,9 @@ struct mlx5_ifc_cmd_hca_cap_bits { 
	u8         reserved_at_202[0x1];

	u8         reserved_at_202[0x1];

	u8         ipoib_enhanced_offloads[0x1];

	u8         ipoib_enhanced_offloads[0x1];

	u8         ipoib_basic_offloads[0x1];

	u8         ipoib_basic_offloads[0x1];

	u8         reserved_at_205[0xa];

	u8         reserved_at_205[0x5];

	u8         umr_fence[0x2];

	u8         reserved_at_20c[0x3];

	u8         drain_sigerr[0x1];

	u8         drain_sigerr[0x1];

	u8         cmdif_checksum[0x2];

	u8         cmdif_checksum[0x2];

	u8         sigerr_cqe[0x1];

	u8         sigerr_cqe[0x1];