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Commit 13e0dde8 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
Browse files

clk: sunxi-ng: Support multiple variable pre-dividers 



On the A83T, the AHB1 clock has a shared pre-divider on the two
PLL-PERIPH clock parents. To support such instances of shared
pre-dividers, this patch extends the mux clock type to support
multiple variable pre-dividers.

As the pre-dividers are only used to calculate the rate, but
do not participate in the factorization process, this is fairly
straightforward.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 11ad470c

drivers/clk/sunxi-ng/ccu-sun50i-a64.c

+5 −5
Original line number Diff line number Diff line
@@ -211,6 +211,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0); 


static const char * const ahb1_parents[] = { "osc32k", "osc24M",

					     "axi", "pll-periph0" };

static const struct ccu_mux_var_prediv ahb1_predivs[] = {

	{ .index = 3, .shift = 6, .width = 2 },

};

static struct ccu_div ahb1_clk = {

	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -218,11 +221,8 @@ static struct ccu_div ahb1_clk = { 
		.shift	= 12,

		.width	= 2,



		.variable_prediv	= {

			.index	= 3,

			.shift	= 6,

			.width	= 2,

		},

		.var_predivs	= ahb1_predivs,

		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),

	},



	.common		= {

drivers/clk/sunxi-ng/ccu-sun6i-a31.c

+5 −5
Original line number Diff line number Diff line
@@ -195,6 +195,9 @@ static SUNXI_CCU_DIV_TABLE(axi_clk, "axi", "cpu", 


static const char * const ahb1_parents[] = { "osc32k", "osc24M",

					     "axi", "pll-periph" };

static const struct ccu_mux_var_prediv ahb1_predivs[] = {

	{ .index = 3, .shift = 6, .width = 2 },

};



static struct ccu_div ahb1_clk = {

	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -203,11 +206,8 @@ static struct ccu_div ahb1_clk = { 
		.shift	= 12,

		.width	= 2,



		.variable_prediv	= {

			.index	= 3,

			.shift	= 6,

			.width	= 2,

		},

		.var_predivs	= ahb1_predivs,

		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),

	},



	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-a23.c

+5 −5
Original line number Diff line number Diff line
@@ -169,6 +169,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0); 


static const char * const ahb1_parents[] = { "osc32k", "osc24M",

					     "axi" , "pll-periph" };

static const struct ccu_mux_var_prediv ahb1_predivs[] = {

	{ .index = 3, .shift = 6, .width = 2 },

};

static struct ccu_div ahb1_clk = {

	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -176,11 +179,8 @@ static struct ccu_div ahb1_clk = { 
		.shift	= 12,

		.width	= 2,



		.variable_prediv	= {

			.index	= 3,

			.shift	= 6,

			.width	= 2,

		},

		.var_predivs	= ahb1_predivs,

		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),

	},



	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-a33.c

+5 −5
Original line number Diff line number Diff line
@@ -180,6 +180,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0); 


static const char * const ahb1_parents[] = { "osc32k", "osc24M",

					     "axi" , "pll-periph" };

static const struct ccu_mux_var_prediv ahb1_predivs[] = {

	{ .index = 3, .shift = 6, .width = 2 },

};

static struct ccu_div ahb1_clk = {

	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -187,11 +190,8 @@ static struct ccu_div ahb1_clk = { 
		.shift	= 12,

		.width	= 2,



		.variable_prediv	= {

			.index	= 3,

			.shift	= 6,

			.width	= 2,

		},

		.var_predivs	= ahb1_predivs,

		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),

	},



	.common		= {

drivers/clk/sunxi-ng/ccu-sun8i-h3.c

+5 −5
Original line number Diff line number Diff line
@@ -141,6 +141,9 @@ static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x050, 0, 2, 0); 


static const char * const ahb1_parents[] = { "osc32k", "osc24M",

					     "axi" , "pll-periph0" };

static const struct ccu_mux_var_prediv ahb1_predivs[] = {

	{ .index = 3, .shift = 6, .width = 2 },

};

static struct ccu_div ahb1_clk = {

	.div		= _SUNXI_CCU_DIV_FLAGS(4, 2, CLK_DIVIDER_POWER_OF_TWO),
@@ -148,11 +151,8 @@ static struct ccu_div ahb1_clk = { 
		.shift	= 12,

		.width	= 2,



		.variable_prediv	= {

			.index	= 3,

			.shift	= 6,

			.width	= 2,

		},

		.var_predivs	= ahb1_predivs,

		.n_var_predivs	= ARRAY_SIZE(ahb1_predivs),

	},



	.common		= {