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Commit 12832dd9 authored by Kieran Bingham's avatar Kieran Bingham Committed by Mauro Carvalho Chehab
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media: vsp1: Adapt entities to configure into a body 



Currently the entities store their configurations into a display list.
Adapt this such that the code can be configured into a body directly,
allowing greater flexibility and control of the content.

All users of vsp1_dl_list_write() are removed in this process, thus it
too is removed.

A helper, vsp1_dl_list_get_body0() is provided to access the internal body0
from the display list.

[laurent.pinchart+renesas@ideasonboard.com: Don't remove blank line unnecessarily]

Signed-off-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent 46ce3639

drivers/media/platform/vsp1/vsp1_brx.c

+11 −11
Original line number Diff line number Diff line
@@ -26,10 +26,10 @@ 
 * Device Access

 */



static inline void vsp1_brx_write(struct vsp1_brx *brx, struct vsp1_dl_list *dl,

				  u32 reg, u32 data)

static inline void vsp1_brx_write(struct vsp1_brx *brx,

				  struct vsp1_dl_body *dlb, u32 reg, u32 data)

{

	vsp1_dl_list_write(dl, brx->base + reg, data);

	vsp1_dl_body_write(dlb, brx->base + reg, data);

}



/* -----------------------------------------------------------------------------
@@ -283,7 +283,7 @@ static const struct v4l2_subdev_ops brx_ops = { 


static void brx_configure_stream(struct vsp1_entity *entity,

				 struct vsp1_pipeline *pipe,

				 struct vsp1_dl_list *dl)

				 struct vsp1_dl_body *dlb)

{

	struct vsp1_brx *brx = to_brx(&entity->subdev);

	struct v4l2_mbus_framefmt *format;
@@ -305,7 +305,7 @@ static void brx_configure_stream(struct vsp1_entity *entity, 
	 * format at the pipeline output is premultiplied.

	 */

	flags = pipe->output ? pipe->output->format.flags : 0;

	vsp1_brx_write(brx, dl, VI6_BRU_INCTRL,

	vsp1_brx_write(brx, dlb, VI6_BRU_INCTRL,

		       flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?

		       0 : VI6_BRU_INCTRL_NRM);
@@ -313,12 +313,12 @@ static void brx_configure_stream(struct vsp1_entity *entity, 
	 * Set the background position to cover the whole output image and

	 * configure its color.

	 */

	vsp1_brx_write(brx, dl, VI6_BRU_VIRRPF_SIZE,

	vsp1_brx_write(brx, dlb, VI6_BRU_VIRRPF_SIZE,

		       (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |

		       (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));

	vsp1_brx_write(brx, dl, VI6_BRU_VIRRPF_LOC, 0);

	vsp1_brx_write(brx, dlb, VI6_BRU_VIRRPF_LOC, 0);



	vsp1_brx_write(brx, dl, VI6_BRU_VIRRPF_COL, brx->bgcolor |

	vsp1_brx_write(brx, dlb, VI6_BRU_VIRRPF_COL, brx->bgcolor |

		       (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));



	/*
@@ -328,7 +328,7 @@ static void brx_configure_stream(struct vsp1_entity *entity, 
	 * unit.

	 */

	if (entity->type == VSP1_ENTITY_BRU)

		vsp1_brx_write(brx, dl, VI6_BRU_ROP,

		vsp1_brx_write(brx, dlb, VI6_BRU_ROP,

			       VI6_BRU_ROP_DSTSEL_BRUIN(1) |

			       VI6_BRU_ROP_CROP(VI6_ROP_NOP) |

			       VI6_BRU_ROP_AROP(VI6_ROP_NOP));
@@ -370,7 +370,7 @@ static void brx_configure_stream(struct vsp1_entity *entity, 
		if (!(entity->type == VSP1_ENTITY_BRU && i == 1))

			ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);



		vsp1_brx_write(brx, dl, VI6_BRU_CTRL(i), ctrl);

		vsp1_brx_write(brx, dlb, VI6_BRU_CTRL(i), ctrl);



		/*

		 * Harcode the blending formula to
@@ -385,7 +385,7 @@ static void brx_configure_stream(struct vsp1_entity *entity, 
		 *

		 * otherwise.

		 */

		vsp1_brx_write(brx, dl, VI6_BRU_BLD(i),

		vsp1_brx_write(brx, dlb, VI6_BRU_BLD(i),

			       VI6_BRU_BLD_CCMDX_255_SRC_A |

			       (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :

						VI6_BRU_BLD_CCMDY_SRC_A) |

drivers/media/platform/vsp1/vsp1_clu.c

+12 −11
Original line number Diff line number Diff line
@@ -25,10 +25,10 @@ 
 * Device Access

 */



static inline void vsp1_clu_write(struct vsp1_clu *clu, struct vsp1_dl_list *dl,

				  u32 reg, u32 data)

static inline void vsp1_clu_write(struct vsp1_clu *clu,

				  struct vsp1_dl_body *dlb, u32 reg, u32 data)

{

	vsp1_dl_list_write(dl, reg, data);

	vsp1_dl_body_write(dlb, reg, data);

}



/* -----------------------------------------------------------------------------
@@ -171,7 +171,7 @@ static const struct v4l2_subdev_ops clu_ops = { 


static void clu_configure_stream(struct vsp1_entity *entity,

				 struct vsp1_pipeline *pipe,

				 struct vsp1_dl_list *dl)

				 struct vsp1_dl_body *dlb)

{

	struct vsp1_clu *clu = to_clu(&entity->subdev);

	struct v4l2_mbus_framefmt *format;
@@ -188,10 +188,11 @@ static void clu_configure_stream(struct vsp1_entity *entity, 


static void clu_configure_frame(struct vsp1_entity *entity,

				struct vsp1_pipeline *pipe,

				struct vsp1_dl_list *dl)

				struct vsp1_dl_list *dl,

				struct vsp1_dl_body *dlb)

{

	struct vsp1_clu *clu = to_clu(&entity->subdev);

	struct vsp1_dl_body *dlb;

	struct vsp1_dl_body *clu_dlb;

	unsigned long flags;

	u32 ctrl = VI6_CLU_CTRL_AAI | VI6_CLU_CTRL_MVS | VI6_CLU_CTRL_EN;
@@ -201,18 +202,18 @@ static void clu_configure_frame(struct vsp1_entity *entity, 
		     |  VI6_CLU_CTRL_OS0_2D | VI6_CLU_CTRL_OS1_2D

		     |  VI6_CLU_CTRL_OS2_2D | VI6_CLU_CTRL_M2D;



	vsp1_clu_write(clu, dl, VI6_CLU_CTRL, ctrl);

	vsp1_clu_write(clu, dlb, VI6_CLU_CTRL, ctrl);



	spin_lock_irqsave(&clu->lock, flags);

	dlb = clu->clu;

	clu_dlb = clu->clu;

	clu->clu = NULL;

	spin_unlock_irqrestore(&clu->lock, flags);



	if (dlb) {

		vsp1_dl_list_add_body(dl, dlb);

	if (clu_dlb) {

		vsp1_dl_list_add_body(dl, clu_dlb);



		/* Release our local reference. */

		vsp1_dl_body_put(dlb);

		vsp1_dl_body_put(clu_dlb);

	}

}

drivers/media/platform/vsp1/vsp1_dl.c

+5 −7
Original line number Diff line number Diff line
@@ -447,17 +447,15 @@ void vsp1_dl_list_put(struct vsp1_dl_list *dl) 
}



/**

 * vsp1_dl_list_write - Write a register to the display list

 * vsp1_dl_list_get_body0 - Obtain the default body for the display list

 * @dl: The display list

 * @reg: The register address

 * @data: The register value

 *

 * Write the given register and value to the display list. Up to 256 registers

 * can be written per display list.

 * Obtain a pointer to the internal display list body allowing this to be passed

 * directly to configure operations.

 */

void vsp1_dl_list_write(struct vsp1_dl_list *dl, u32 reg, u32 data)

struct vsp1_dl_body *vsp1_dl_list_get_body0(struct vsp1_dl_list *dl)

{

	vsp1_dl_body_write(dl->body0, reg, data);

	return dl->body0;

}



/**

drivers/media/platform/vsp1/vsp1_dl.h

+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ unsigned int vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm); 


struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm);

void vsp1_dl_list_put(struct vsp1_dl_list *dl);

void vsp1_dl_list_write(struct vsp1_dl_list *dl, u32 reg, u32 data);

struct vsp1_dl_body *vsp1_dl_list_get_body0(struct vsp1_dl_list *dl);

void vsp1_dl_list_commit(struct vsp1_dl_list *dl, bool internal);



struct vsp1_dl_body_pool *

drivers/media/platform/vsp1/vsp1_drm.c

+7 −5
Original line number Diff line number Diff line
@@ -536,13 +536,15 @@ static void vsp1_du_pipeline_configure(struct vsp1_pipeline *pipe) 
	struct vsp1_entity *entity;

	struct vsp1_entity *next;

	struct vsp1_dl_list *dl;

	struct vsp1_dl_body *dlb;



	dl = vsp1_dl_list_get(pipe->output->dlm);

	dlb = vsp1_dl_list_get_body0(dl);



	list_for_each_entry_safe(entity, next, &pipe->entities, list_pipe) {

		/* Disconnect unused entities from the pipeline. */

		if (!entity->pipe) {

			vsp1_dl_list_write(dl, entity->route->reg,

			vsp1_dl_body_write(dlb, entity->route->reg,

					   VI6_DPR_NODE_UNUSED);



			entity->sink = NULL;
@@ -551,10 +553,10 @@ static void vsp1_du_pipeline_configure(struct vsp1_pipeline *pipe) 
			continue;

		}



		vsp1_entity_route_setup(entity, pipe, dl);

		vsp1_entity_configure_stream(entity, pipe, dl);

		vsp1_entity_configure_frame(entity, pipe, dl);

		vsp1_entity_configure_partition(entity, pipe, dl);

		vsp1_entity_route_setup(entity, pipe, dlb);

		vsp1_entity_configure_stream(entity, pipe, dlb);

		vsp1_entity_configure_frame(entity, pipe, dl, dlb);

		vsp1_entity_configure_partition(entity, pipe, dl, dlb);

	}



	vsp1_dl_list_commit(dl, drm_pipe->force_brx_release);