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Commit 12549e27 authored by Daniel Lezcano's avatar Daniel Lezcano
Browse files

clocksource/drivers/time-armada-370-xp: Convert init function to return error



The init functions do not return any error. They behave as the following:

  - panic, thus leading to a kernel crash while another timer may work and
       make the system boot up correctly

  or

  - print an error and let the caller unaware if the state of the system

Change that by converting the init functions to return an error conforming
to the CLOCKSOURCE_OF_RET prototype.

Proper error handling (rollback, errno value) will be changed later case
by case, thus this change just return back an error or success in the init
function.

Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 53978bba
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+76 −26
Original line number Diff line number Diff line
@@ -260,14 +260,22 @@ static struct delay_timer armada_370_delay_timer = {
	.read_current_timer = armada_370_delay_timer_read,
};

static void __init armada_370_xp_timer_common_init(struct device_node *np)
static int __init armada_370_xp_timer_common_init(struct device_node *np)
{
	u32 clr = 0, set = 0;
	int res;

	timer_base = of_iomap(np, 0);
	WARN_ON(!timer_base);
	if (!timer_base) {
		pr_err("Failed to iomap");
		return -ENXIO;
	}

	local_base = of_iomap(np, 1);
	if (!local_base) {
		pr_err("Failed to iomap");
		return -ENXIO;
	}

	if (timer25Mhz) {
		set = TIMER0_25MHZ;		
@@ -306,14 +314,19 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
	 */
	sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk);

	clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,
	res = clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,
				    "armada_370_xp_clocksource",
				    timer_clk, 300, 32, clocksource_mmio_readl_down);
	if (res) {
		pr_err("Failed to initialize clocksource mmio");
		return res;
	}

	register_cpu_notifier(&armada_370_xp_timer_cpu_nb);

	armada_370_xp_evt = alloc_percpu(struct clock_event_device);

	if (!armada_370_xp_evt)
		return -ENOMEM;

	/*
	 * Setup clockevent timer (interrupt-driven).
@@ -323,33 +336,54 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
				"armada_370_xp_per_cpu_tick",
				armada_370_xp_evt);
	/* Immediately configure the timer on the boot CPU */
	if (!res)
		armada_370_xp_timer_setup(this_cpu_ptr(armada_370_xp_evt));
	if (res) {
		pr_err("Failed to request percpu irq");
		return res;
	}

	res = armada_370_xp_timer_setup(this_cpu_ptr(armada_370_xp_evt));
	if (!res) {
		pr_err("Failed to setup timer");
		return res;
	}

	register_syscore_ops(&armada_370_xp_timer_syscore_ops);
	
	return 0;
}

static void __init armada_xp_timer_init(struct device_node *np)
static int __init armada_xp_timer_init(struct device_node *np)
{
	struct clk *clk = of_clk_get_by_name(np, "fixed");
	int ret;

	clk = of_clk_get(np, 0);
	if (IS_ERR(clk)) {
		pr_err("Failed to get clock");
		return PTR_ERR(clk);
	}

	ret = clk_prepare_enable(clk);
	if (ret)
		return ret;

	/* The 25Mhz fixed clock is mandatory, and must always be available */
	BUG_ON(IS_ERR(clk));
	clk_prepare_enable(clk);
	timer_clk = clk_get_rate(clk);

	armada_370_xp_timer_common_init(np);
	return armada_370_xp_timer_common_init(np);
}
CLOCKSOURCE_OF_DECLARE(armada_xp, "marvell,armada-xp-timer",
CLOCKSOURCE_OF_DECLARE_RET(armada_xp, "marvell,armada-xp-timer",
		       armada_xp_timer_init);

static void __init armada_375_timer_init(struct device_node *np)
static int __init armada_375_timer_init(struct device_node *np)
{
	struct clk *clk;
	int ret;

	clk = of_clk_get_by_name(np, "fixed");
	if (!IS_ERR(clk)) {
		clk_prepare_enable(clk);
		ret = clk_prepare_enable(clk);
		if (ret)
			return ret;
		timer_clk = clk_get_rate(clk);
	} else {

@@ -360,27 +394,43 @@ static void __init armada_375_timer_init(struct device_node *np)
		clk = of_clk_get(np, 0);

		/* Must have at least a clock */
		BUG_ON(IS_ERR(clk));
		clk_prepare_enable(clk);
		if (IS_ERR(clk)) {
			pr_err("Failed to get clock");
			return PTR_ERR(clk);
		}

		ret = clk_prepare_enable(clk);
		if (ret)
			return ret;

		timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
		timer25Mhz = false;
	}

	armada_370_xp_timer_common_init(np);
	return armada_370_xp_timer_common_init(np);
}
CLOCKSOURCE_OF_DECLARE(armada_375, "marvell,armada-375-timer",
CLOCKSOURCE_OF_DECLARE_RET(armada_375, "marvell,armada-375-timer",
		       armada_375_timer_init);

static void __init armada_370_timer_init(struct device_node *np)
static int __init armada_370_timer_init(struct device_node *np)
{
	struct clk *clk = of_clk_get(np, 0);
	struct clk *clk;
	int ret;

	clk = of_clk_get(np, 0);
	if (IS_ERR(clk)) {
		pr_err("Failed to get clock");
		return PTR_ERR(clk);
	}

	ret = clk_prepare_enable(clk);
	if (ret)
		return ret;

	BUG_ON(IS_ERR(clk));
	clk_prepare_enable(clk);
	timer_clk = clk_get_rate(clk) / TIMER_DIVIDER;
	timer25Mhz = false;

	armada_370_xp_timer_common_init(np);
	return armada_370_xp_timer_common_init(np);
}
CLOCKSOURCE_OF_DECLARE(armada_370, "marvell,armada-370-timer",
CLOCKSOURCE_OF_DECLARE_RET(armada_370, "marvell,armada-370-timer",
		       armada_370_timer_init);