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Commit 11a914c2 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Make IS_VALLEYVIEW only take dev_priv 



Saves 944 bytes of .rodata strings and 128 bytes of .text.

v2: Add parantheses around dev_priv. (Ville Syrjala)

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarDavid Weinehall <david.weinehall@linux.intel.com>
Acked-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: default avatarJani Nikula <jani.nikula@linux.intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
parent 920a14b2

drivers/gpu/drm/i915/i915_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -2655,7 +2655,7 @@ struct drm_i915_cmd_table { 
#define IS_IVB_GT1(dev_priv)	(INTEL_DEVID(dev_priv) == 0x0156 || \

				 INTEL_DEVID(dev_priv) == 0x0152 || \

				 INTEL_DEVID(dev_priv) == 0x015a)

#define IS_VALLEYVIEW(dev)	(INTEL_INFO(dev)->is_valleyview)

#define IS_VALLEYVIEW(dev_priv)	((dev_priv)->info.is_valleyview)

#define IS_CHERRYVIEW(dev_priv)	((dev_priv)->info.is_cherryview)

#define IS_HASWELL(dev_priv)	((dev_priv)->info.is_haswell)

#define IS_BROADWELL(dev_priv)	((dev_priv)->info.is_broadwell)

drivers/gpu/drm/i915/i915_gem_fence.c

+1 −1
Original line number Diff line number Diff line
@@ -465,7 +465,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) 
	uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;

	uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;



	if (INTEL_INFO(dev)->gen >= 8 || IS_VALLEYVIEW(dev)) {

	if (INTEL_GEN(dev_priv) >= 8 || IS_VALLEYVIEW(dev_priv)) {

		/*

		 * On BDW+, swizzling is not used. We leave the CPU memory

		 * controller in charge of optimizing memory accesses without

drivers/gpu/drm/i915/i915_gpu_error.c

+2 −2
Original line number Diff line number Diff line
@@ -1424,7 +1424,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, 
	 */



	/* 1: Registers specific to a single generation */

	if (IS_VALLEYVIEW(dev)) {

	if (IS_VALLEYVIEW(dev_priv)) {

		error->gtier[0] = I915_READ(GTIER);

		error->ier = I915_READ(VLV_IER);

		error->forcewake = I915_READ_FW(FORCEWAKE_VLV);
@@ -1473,7 +1473,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, 
		error->gtier[0] = I915_READ(GTIER);

	} else if (IS_GEN2(dev)) {

		error->ier = I915_READ16(IER);

	} else if (!IS_VALLEYVIEW(dev)) {

	} else if (!IS_VALLEYVIEW(dev_priv)) {

		error->ier = I915_READ(IER);

	}

	error->eir = I915_READ(EIR);

drivers/gpu/drm/i915/intel_crt.c

+3 −3
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ intel_crt_mode_valid(struct drm_connector *connector, 


	if (HAS_PCH_LPT(dev_priv))

		max_clock = 180000;

	else if (IS_VALLEYVIEW(dev))

	else if (IS_VALLEYVIEW(dev_priv))

		/*

		 * 270 MHz due to current DPLL limits,

		 * DAC limit supposedly 355 MHz.
@@ -423,7 +423,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector) 
	if (HAS_PCH_SPLIT(dev_priv))

		return intel_ironlake_crt_detect_hotplug(connector);



	if (IS_VALLEYVIEW(dev))

	if (IS_VALLEYVIEW(dev_priv))

		return valleyview_crt_detect_hotplug(connector);



	/*
@@ -850,7 +850,7 @@ void intel_crt_init(struct drm_device *dev) 


	if (HAS_PCH_SPLIT(dev_priv))

		adpa_reg = PCH_ADPA;

	else if (IS_VALLEYVIEW(dev))

	else if (IS_VALLEYVIEW(dev_priv))

		adpa_reg = VLV_ADPA;

	else

		adpa_reg = ADPA;

drivers/gpu/drm/i915/intel_display.c

+3 −3
Original line number Diff line number Diff line
@@ -5874,7 +5874,7 @@ static void intel_update_max_cdclk(struct drm_device *dev) 
			dev_priv->max_cdclk_freq = 675000;

	} else if (IS_CHERRYVIEW(dev_priv)) {

		dev_priv->max_cdclk_freq = 320000;

	} else if (IS_VALLEYVIEW(dev)) {

	} else if (IS_VALLEYVIEW(dev_priv)) {

		dev_priv->max_cdclk_freq = 400000;

	} else {

		/* otherwise assume cdclk is fixed */
@@ -6838,7 +6838,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state, 
	if (!intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI)) {

		if (IS_CHERRYVIEW(dev_priv))

			chv_disable_pll(dev_priv, pipe);

		else if (IS_VALLEYVIEW(dev))

		else if (IS_VALLEYVIEW(dev_priv))

			vlv_disable_pll(dev_priv, pipe);

		else

			i9xx_disable_pll(intel_crtc);
@@ -8904,7 +8904,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, 


	if (IS_CHERRYVIEW(dev_priv))

		chv_crtc_clock_get(crtc, pipe_config);

	else if (IS_VALLEYVIEW(dev))

	else if (IS_VALLEYVIEW(dev_priv))

		vlv_crtc_clock_get(crtc, pipe_config);

	else

		i9xx_crtc_clock_get(crtc, pipe_config);