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Commit 114ec3a6 authored by Jim Dickerson's avatar Jim Dickerson Committed by Greg Kroah-Hartman
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usb: pci-quirks.c: Corrected timeout values used in handshake 



Servers were emitting failed handoff messages but were not
waiting the full 1 second as designated in section 4.22.1 of
the eXtensible Host Controller Interface specifications. The
handshake was using wrong units so calls were made with milliseconds
not microseconds. Comments referenced 5 seconds not 1 second as
in specs.

The wrong units were also corrected in a second handshake call.

Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarJim Dickerson <jim.dickerson@hpe.com>
Signed-off-by: default avatarMathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5a838a13

drivers/usb/host/pci-quirks.c

+4 −4
Original line number Diff line number Diff line
@@ -1022,7 +1022,7 @@ EXPORT_SYMBOL_GPL(usb_disable_xhci_ports); 
 *

 * Takes care of the handoff between the Pre-OS (i.e. BIOS) and the OS.

 * It signals to the BIOS that the OS wants control of the host controller,

 * and then waits 5 seconds for the BIOS to hand over control.

 * and then waits 1 second for the BIOS to hand over control.

 * If we timeout, assume the BIOS is broken and take control anyway.

 */

static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
@@ -1069,9 +1069,9 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev) 
	if (val & XHCI_HC_BIOS_OWNED) {

		writel(val | XHCI_HC_OS_OWNED, base + ext_cap_offset);



		/* Wait for 5 seconds with 10 microsecond polling interval */

		/* Wait for 1 second with 10 microsecond polling interval */

		timeout = handshake(base + ext_cap_offset, XHCI_HC_BIOS_OWNED,

				0, 5000, 10);

				0, 1000000, 10);



		/* Assume a buggy BIOS and take HC ownership anyway */

		if (timeout) {
@@ -1100,7 +1100,7 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev) 
	 * operational or runtime registers.  Wait 5 seconds and no more.

	 */

	timeout = handshake(op_reg_base + XHCI_STS_OFFSET, XHCI_STS_CNR, 0,

			5000, 10);

			5000000, 10);

	/* Assume a buggy HC and start HC initialization anyway */

	if (timeout) {

		val = readl(op_reg_base + XHCI_STS_OFFSET);