Loading drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -67,5 +67,6 @@ int nv04_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int g84_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); #endif #endif drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +13 −13 Original line number Original line Diff line number Diff line Loading @@ -927,7 +927,7 @@ nv84_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g84_pci_new, .pci = g84_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -959,7 +959,7 @@ nv86_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g84_pci_new, .pci = g84_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -991,7 +991,7 @@ nv92_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g92_pci_new, .pci = g92_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1023,7 +1023,7 @@ nv94_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1055,7 +1055,7 @@ nv96_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1087,7 +1087,7 @@ nv98_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1119,7 +1119,7 @@ nva0_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1151,7 +1151,7 @@ nva3_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading Loading @@ -1185,7 +1185,7 @@ nva5_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading Loading @@ -1218,7 +1218,7 @@ nva8_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading Loading @@ -1251,7 +1251,7 @@ nvaa_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1283,7 +1283,7 @@ nvac_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1315,7 +1315,7 @@ nvaf_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild +1 −0 Original line number Original line Diff line number Diff line Loading @@ -3,4 +3,5 @@ nvkm-y += nvkm/subdev/mmu/nv04.o nvkm-y += nvkm/subdev/mmu/nv41.o nvkm-y += nvkm/subdev/mmu/nv41.o nvkm-y += nvkm/subdev/mmu/nv44.o nvkm-y += nvkm/subdev/mmu/nv44.o nvkm-y += nvkm/subdev/mmu/nv50.o nvkm-y += nvkm/subdev/mmu/nv50.o nvkm-y += nvkm/subdev/mmu/g84.o nvkm-y += nvkm/subdev/mmu/gf100.o nvkm-y += nvkm/subdev/mmu/gf100.o drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.c 0 → 100644 +43 −0 Original line number Original line Diff line number Diff line /* * Copyright 2017 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "priv.h" static const struct nvkm_mmu_func g84_mmu = { .limit = (1ULL << 40), .dma_bits = 40, .pgt_bits = 29 - 12, .spg_shift = 12, .lpg_shift = 16, .create = nv50_vm_create, .map_pgt = nv50_vm_map_pgt, .map = nv50_vm_map, .map_sg = nv50_vm_map_sg, .unmap = nv50_vm_unmap, .flush = nv50_vm_flush, }; int g84_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu) { return nvkm_mmu_new_(&g84_mmu, device, index, pmmu); } drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c +6 −6 Original line number Original line Diff line number Diff line Loading @@ -28,7 +28,7 @@ #include <subdev/timer.h> #include <subdev/timer.h> #include <engine/gr.h> #include <engine/gr.h> static void void nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2]) nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2]) { { u64 phys = 0xdeadcafe00000000ULL; u64 phys = 0xdeadcafe00000000ULL; Loading Loading @@ -73,7 +73,7 @@ vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target) return phys; return phys; } } static void void nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) { { Loading Loading @@ -123,7 +123,7 @@ nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, nvkm_done(pgt); nvkm_done(pgt); } } static void void nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt, nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt, struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) { { Loading @@ -139,7 +139,7 @@ nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt, nvkm_done(pgt); nvkm_done(pgt); } } static void void nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt) nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt) { { pte <<= 3; pte <<= 3; Loading @@ -152,7 +152,7 @@ nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt) nvkm_done(pgt); nvkm_done(pgt); } } static void void nv50_vm_flush(struct nvkm_vm *vm) nv50_vm_flush(struct nvkm_vm *vm) { { struct nvkm_mmu *mmu = vm->mmu; struct nvkm_mmu *mmu = vm->mmu; Loading Loading @@ -198,7 +198,7 @@ nv50_vm_flush(struct nvkm_vm *vm) mutex_unlock(&subdev->mutex); mutex_unlock(&subdev->mutex); } } static int int nv50_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset, nv50_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset, struct lock_class_key *key, struct nvkm_vm **pvm) struct lock_class_key *key, struct nvkm_vm **pvm) { { Loading Loading
drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -67,5 +67,6 @@ int nv04_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int g84_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **); #endif #endif
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +13 −13 Original line number Original line Diff line number Diff line Loading @@ -927,7 +927,7 @@ nv84_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g84_pci_new, .pci = g84_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -959,7 +959,7 @@ nv86_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g84_pci_new, .pci = g84_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -991,7 +991,7 @@ nv92_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g92_pci_new, .pci = g92_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1023,7 +1023,7 @@ nv94_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1055,7 +1055,7 @@ nv96_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1087,7 +1087,7 @@ nv98_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1119,7 +1119,7 @@ nva0_chipset = { .i2c = nv50_i2c_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g84_mc_new, .mc = g84_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1151,7 +1151,7 @@ nva3_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading Loading @@ -1185,7 +1185,7 @@ nva5_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading Loading @@ -1218,7 +1218,7 @@ nva8_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading Loading @@ -1251,7 +1251,7 @@ nvaa_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1283,7 +1283,7 @@ nvac_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = g98_mc_new, .mc = g98_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .therm = g84_therm_new, .therm = g84_therm_new, Loading Loading @@ -1315,7 +1315,7 @@ nvaf_chipset = { .i2c = g94_i2c_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, .imem = nv50_instmem_new, .mc = gt215_mc_new, .mc = gt215_mc_new, .mmu = nv50_mmu_new, .mmu = g84_mmu_new, .mxm = nv50_mxm_new, .mxm = nv50_mxm_new, .pci = g94_pci_new, .pci = g94_pci_new, .pmu = gt215_pmu_new, .pmu = gt215_pmu_new, Loading
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/Kbuild +1 −0 Original line number Original line Diff line number Diff line Loading @@ -3,4 +3,5 @@ nvkm-y += nvkm/subdev/mmu/nv04.o nvkm-y += nvkm/subdev/mmu/nv41.o nvkm-y += nvkm/subdev/mmu/nv41.o nvkm-y += nvkm/subdev/mmu/nv44.o nvkm-y += nvkm/subdev/mmu/nv44.o nvkm-y += nvkm/subdev/mmu/nv50.o nvkm-y += nvkm/subdev/mmu/nv50.o nvkm-y += nvkm/subdev/mmu/g84.o nvkm-y += nvkm/subdev/mmu/gf100.o nvkm-y += nvkm/subdev/mmu/gf100.o
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.c 0 → 100644 +43 −0 Original line number Original line Diff line number Diff line /* * Copyright 2017 Red Hat Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include "priv.h" static const struct nvkm_mmu_func g84_mmu = { .limit = (1ULL << 40), .dma_bits = 40, .pgt_bits = 29 - 12, .spg_shift = 12, .lpg_shift = 16, .create = nv50_vm_create, .map_pgt = nv50_vm_map_pgt, .map = nv50_vm_map, .map_sg = nv50_vm_map_sg, .unmap = nv50_vm_unmap, .flush = nv50_vm_flush, }; int g84_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu) { return nvkm_mmu_new_(&g84_mmu, device, index, pmmu); }
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.c +6 −6 Original line number Original line Diff line number Diff line Loading @@ -28,7 +28,7 @@ #include <subdev/timer.h> #include <subdev/timer.h> #include <engine/gr.h> #include <engine/gr.h> static void void nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2]) nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2]) { { u64 phys = 0xdeadcafe00000000ULL; u64 phys = 0xdeadcafe00000000ULL; Loading Loading @@ -73,7 +73,7 @@ vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target) return phys; return phys; } } static void void nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta) { { Loading Loading @@ -123,7 +123,7 @@ nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt, nvkm_done(pgt); nvkm_done(pgt); } } static void void nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt, nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt, struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list) { { Loading @@ -139,7 +139,7 @@ nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt, nvkm_done(pgt); nvkm_done(pgt); } } static void void nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt) nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt) { { pte <<= 3; pte <<= 3; Loading @@ -152,7 +152,7 @@ nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt) nvkm_done(pgt); nvkm_done(pgt); } } static void void nv50_vm_flush(struct nvkm_vm *vm) nv50_vm_flush(struct nvkm_vm *vm) { { struct nvkm_mmu *mmu = vm->mmu; struct nvkm_mmu *mmu = vm->mmu; Loading Loading @@ -198,7 +198,7 @@ nv50_vm_flush(struct nvkm_vm *vm) mutex_unlock(&subdev->mutex); mutex_unlock(&subdev->mutex); } } static int int nv50_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset, nv50_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset, struct lock_class_key *key, struct nvkm_vm **pvm) struct lock_class_key *key, struct nvkm_vm **pvm) { { Loading