Commit 0f29e573 authored May 10, 2015 by Andi Kleen Committed by Ingo Molnar Aug 04, 2015

perf/x86/intel: Move PMU ACK to after LBR read



With Arch Perfmon v4 the PMU ack unfreezes the LBRs. So we need to do
the PMU ack after the LBR reading, otherwise the LBRs would be polluted
by the PMI handler.

This is a minimal change. In principle the ACK could be moved much later.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1431285767-27027-10-git-send-email-andi@firstfloor.org


Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent d8020bee

arch/x86/kernel/cpu/perf_event_intel.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1594,6 +1594,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)

		loops = 0;
		again:
		intel_pmu_lbr_read();
		intel_pmu_ack_status(status);
		if (++loops > 100) {
		static bool warned = false;
		@@ -1608,7 +1609,6 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)

		inc_irq_stat(apic_perf_irqs);

		intel_pmu_lbr_read();

		/*
		* Ignore a range of extra bits in status that do not indicate