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Commit 0eece2b2 authored by Marc Zyngier's avatar Marc Zyngier Committed by Thomas Gleixner
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irqchip/gic: Make sure all interrupts are deactivated at boot 



When booting a GIC/GICv3 based system, we have no idea what
state the firmware (or previous kernel in the case of kexec)
has left the GIC, and some interrupts may still be active.

In order to garantee that we have a clean state, make sure
the active bits are cleared at init time.

Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/1447701208-18150-3-git-send-email-marc.zyngier@arm.com


Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 8005c49d

drivers/irqchip/irq-gic-common.c

+9 −4
Original line number Diff line number Diff line
@@ -84,12 +84,15 @@ void __init gic_dist_config(void __iomem *base, int gic_irqs, 
		writel_relaxed(GICD_INT_DEF_PRI_X4, base + GIC_DIST_PRI + i);



	/*

	 * Disable all interrupts.  Leave the PPI and SGIs alone

	 * as they are enabled by redistributor registers.

	 * Deactivate and disable all SPIs. Leave the PPI and SGIs

	 * alone as they are in the redistributor registers on GICv3.

	 */

	for (i = 32; i < gic_irqs; i += 32)

	for (i = 32; i < gic_irqs; i += 32) {

		writel_relaxed(GICD_INT_EN_CLR_X32,

			       base + GIC_DIST_ACTIVE_CLEAR + i / 8);

		writel_relaxed(GICD_INT_EN_CLR_X32,

			       base + GIC_DIST_ENABLE_CLEAR + i / 8);

	}



	if (sync_access)

		sync_access();
@@ -102,7 +105,9 @@ void gic_cpu_config(void __iomem *base, void (*sync_access)(void)) 
	/*

	 * Deal with the banked PPI and SGI interrupts - disable all

	 * PPI interrupts, ensure all SGI interrupts are enabled.

	 * Make sure everything is deactivated.

	 */

	writel_relaxed(GICD_INT_EN_CLR_X32, base + GIC_DIST_ACTIVE_CLEAR);

	writel_relaxed(GICD_INT_EN_CLR_PPI, base + GIC_DIST_ENABLE_CLEAR);

	writel_relaxed(GICD_INT_EN_SET_SGI, base + GIC_DIST_ENABLE_SET);