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Commit 0dc6f20b authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Jani Nikula
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drm/i915/bdw: PCI IDs ending in 0xb are ULT.



When reviewing patch that fixes VGA on BDW Halo Jani noticed that
we also had other ULT IDs that weren't listed there.

So this follow-up patch add these pci-ids as halo and fix comments
on i915_pciids.h

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent c517d838
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+1 −0
Original line number Diff line number Diff line
@@ -2374,6 +2374,7 @@ struct drm_i915_cmd_table {
				 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev)		(IS_BROADWELL(dev) && \
				 ((INTEL_DEVID(dev) & 0xf) == 0x6 ||	\
				 (INTEL_DEVID(dev) & 0xf) == 0xb ||	\
				 (INTEL_DEVID(dev) & 0xf) == 0xe))
#define IS_BDW_GT3(dev)		(IS_BROADWELL(dev) && \
				 (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
+2 −2
Original line number Diff line number Diff line
@@ -214,9 +214,9 @@
	INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)

#define _INTEL_BDW_M_IDS(gt, info) \
	_INTEL_BDW_M(gt, 0x1602, info), /* ULT */ \
	_INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \
	_INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \
	_INTEL_BDW_M(gt, 0x160B, info), /* Iris */ \
	_INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \
	_INTEL_BDW_M(gt, 0x160E, info) /* ULX */

#define _INTEL_BDW_D_IDS(gt, info) \