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Commit 0d8e1439 authored by Anjali Singhai Jain's avatar Anjali Singhai Jain Committed by Jeff Kirsher
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i40e: Add IWARP support for X722 



X722 supports IWARP, this patch handles checking for PE critical errors.
Since the driver doesn't support the IWARP interface for now, this patch
just does bare minimum to log a message oif a PE critical error
happens.

Signed-off-by: default avatarAnjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: default avatarCatherine Sullivan <catherine.sullivan@intel.com>
Tested-by: default avatarJim Young <james.m.young@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 527274c7

drivers/net/ethernet/intel/i40e/i40e_main.c

+10 −0
Original line number Diff line number Diff line
@@ -2908,6 +2908,9 @@ static void i40e_enable_misc_int_causes(struct i40e_pf *pf) 
	      I40E_PFINT_ICR0_ENA_VFLR_MASK          |

	      I40E_PFINT_ICR0_ENA_ADMINQ_MASK;



	if (pf->flags & I40E_FLAG_IWARP_ENABLED)

		val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;



	if (pf->flags & I40E_FLAG_PTP)

		val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
@@ -3198,6 +3201,13 @@ static irqreturn_t i40e_intr(int irq, void *data) 
	    (icr0 & I40E_PFINT_ICR0_SWINT_MASK))

		pf->sw_int_count++;



	if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&

	    (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {

		ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;

		icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;

		dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");

	}



	/* only q0 is used in MSI/Legacy mode, and none are used in MSIX */

	if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {