Commit 0d519f2d authored Sep 08, 2017 by Linus Torvalds

Merge tag 'pci-v4.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:

 - add enhanced Downstream Port Containment support, which prints more
   details about Root Port Programmed I/O errors (Dongdong Liu)

 - add Layerscape ls1088a and ls2088a support (Hou Zhiqiang)

 - add MediaTek MT2712 and MT7622 support (Ryder Lee)

 - add MediaTek MT2712 and MT7622 MSI support (Honghui Zhang)

 - add Qualcom IPQ8074 support (Varadarajan Narayanan)

 - add R-Car r8a7743/5 device tree support (Biju Das)

 - add Rockchip per-lane PHY support for better power management (Shawn
   Lin)

 - fix IRQ mapping for hot-added devices by replacing the
   pci_fixup_irqs() boot-time design with a host bridge hook called at
   probe-time (Lorenzo Pieralisi, Matthew Minter)

 - fix race when enabling two devices that results in upstream bridge
   not being enabled correctly (Srinath Mannam)

 - fix pciehp power fault infinite loop (Keith Busch)

 - fix SHPC bridge MSI hotplug events by enabling bus mastering
   (Aleksandr Bezzubikov)

 - fix a VFIO issue by correcting PCIe capability sizes (Alex
   Williamson)

 - fix an INTD issue on Xilinx and possibly other drivers by unifying
   INTx IRQ domain support (Paul Burton)

 - avoid IOMMU stalls by marking AMD Stoney GPU ATS as broken (Joerg
   Roedel)

 - allow APM X-Gene device assignment to guests by adding an ACS quirk
   (Feng Kan)

 - fix driver crashes by disabling Extended Tags on Broadcom HT2100
   (Extended Tags support is required for PCIe Receivers but not
   Requesters, and we now enable them by default when Requesters support
   them) (Sinan Kaya)

 - fix MSIs for devices that use phantom RIDs for DMA by assuming MSIs
   use the real Requester ID (not a phantom RID) (Robin Murphy)

 - prevent assignment of Intel VMD children to guests (which may be
   supported eventually, but isn't yet) by not associating an IOMMU with
   them (Jon Derrick)

 - fix Intel VMD suspend/resume by releasing IRQs on suspend (Scott
   Bauer)

 - fix a Function-Level Reset issue with Intel 750 NVMe by waiting
   longer (up to 60sec instead of 1sec) for device to become ready
   (Sinan Kaya)

 - fix a Function-Level Reset issue on iProc Stingray by working around
   hardware defects in the CRS implementation (Oza Pawandeep)

 - fix an issue with Intel NVMe P3700 after an iProc reset by adding a
   delay during shutdown (Oza Pawandeep)

 - fix a Microsoft Hyper-V lockdep issue by polling instead of blocking
   in compose_msi_msg() (Stephen Hemminger)

 - fix a wireless LAN driver timeout by clearing DesignWare MSI
   interrupt status after it is handled, not before (Faiz Abbas)

 - fix DesignWare ATU enable checking (Jisheng Zhang)

 - reduce Layerscape dependencies on the bootloader by doing more
   initialization in the driver (Hou Zhiqiang)

 - improve Intel VMD performance allowing allocation of more IRQ vectors
   than present CPUs (Keith Busch)

 - improve endpoint framework support for initial DMA mask, different
   BAR sizes, configurable page sizes, MSI, test driver, etc (Kishon
   Vijay Abraham I, Stan Drozd)

 - rework CRS support to add periodic messages while we poll during
   enumeration and after Function-Level Reset and prepare for possible
   other uses of CRS (Sinan Kaya)

 - clean up Root Port AER handling by removing unnecessary code and
   moving error handler methods to struct pcie_port_service_driver
   (Christoph Hellwig)

 - clean up error handling paths in various drivers (Bjorn Andersson,
   Fabio Estevam, Gustavo A. R. Silva, Harunobu Kurokawa, Jeffy Chen,
   Lorenzo Pieralisi, Sergei Shtylyov)

 - clean up SR-IOV resource handling by disabling VF decoding before
   updating the corresponding resource structs (Gavin Shan)

 - clean up DesignWare-based drivers by unifying quirks to update Class
   Code and Interrupt Pin and related handling of write-protected
   registers (Hou Zhiqiang)

 - clean up by adding empty generic pcibios_align_resource() and
   pcibios_fixup_bus() and removing empty arch-specific implementations
   (Palmer Dabbelt)

 - request exclusive reset control for several drivers to allow cleanup
   elsewhere (Philipp Zabel)

 - constify various structures (Arvind Yadav, Bhumika Goyal)

 - convert from full_name() to %pOF (Rob Herring)

 - remove unused variables from iProc, HiSi, Altera, Keystone (Shawn
   Lin)

* tag 'pci-v4.14-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (170 commits)
  PCI: xgene: Clean up whitespace
  PCI: xgene: Define XGENE_PCI_EXP_CAP and use generic PCI_EXP_RTCTL offset
  PCI: xgene: Fix platform_get_irq() error handling
  PCI: xilinx-nwl: Fix platform_get_irq() error handling
  PCI: rockchip: Fix platform_get_irq() error handling
  PCI: altera: Fix platform_get_irq() error handling
  PCI: spear13xx: Fix platform_get_irq() error handling
  PCI: artpec6: Fix platform_get_irq() error handling
  PCI: armada8k: Fix platform_get_irq() error handling
  PCI: dra7xx: Fix platform_get_irq() error handling
  PCI: exynos: Fix platform_get_irq() error handling
  PCI: iproc: Clean up whitespace
  PCI: iproc: Rename PCI_EXP_CAP to IPROC_PCI_EXP_CAP
  PCI: iproc: Add 500ms delay during device shutdown
  PCI: Fix typos and whitespace errors
  PCI: Remove unused "res" variable from pci_resource_io()
  PCI: Correct kernel-doc of pci_vpd_srdt_size(), pci_vpd_srdt_tag()
  PCI/AER: Reformat AER register definitions
  iommu/vt-d: Prevent VMD child devices from being remapping targets
  x86/PCI: Use is_vmd() rather than relying on the domain number
  ...

parents 0756b7fb cf2d8041

CREDITS

+1 −1

Original line number	Diff line number	Diff line
		@@ -2090,7 +2090,7 @@ S: Kuala Lumpur, Malaysia

		N: Mohit Kumar
		D: ST Microelectronics SPEAr13xx PCI host bridge driver
		D: Synopsys Designware PCI host bridge driver
		D: Synopsys DesignWare PCI host bridge driver

		N: Gabor Kuti
		E: seasons@falcon.sch.bme.hu

Documentation/devicetree/bindings/pci/83xx-512x-pci.txt

+3 −3

Original line number	Diff line number	Diff line
		* Freescale 83xx and 512x PCI bridges

		Freescale 83xx and 512x SOCs include the same pci bridge core.
		Freescale 83xx and 512x SOCs include the same PCI bridge core.

		83xx/512x specific notes:
		- reg: should contain two address length tuples
		The first is for the internal pci bridge registers
		The second is for the pci config space access registers
		The first is for the internal PCI bridge registers
		The second is for the PCI config space access registers

		Example (MPC8313ERDB)
		pci0: pci@e0008500 {

Documentation/devicetree/bindings/pci/altera-pcie.txt

+9 −9

Original line number	Diff line number	Diff line
		@@ -7,21 +7,21 @@ Required properties:
		"Txs": TX slave port region
		"Cra": Control register access region
		- interrupt-parent: interrupt source phandle.
		- interrupts: specifies the interrupt source of the parent interrupt controller.
		The format of the interrupt specifier depends on the parent interrupt
		controller.
		- interrupts: specifies the interrupt source of the parent interrupt
		controller. The format of the interrupt specifier depends
		on the parent interrupt controller.
		- device_type: must be "pci"
		- #address-cells: set to <3>
		- #size-cells: set to <2>
		- #interrupt-cells: set to <1>
		- ranges: describes the translation of addresses for root ports and standard
		PCI regions.
		- ranges: describes the translation of addresses for root ports and
		standard PCI regions.
		- interrupt-map-mask and interrupt-map: standard PCI properties to define the
		mapping of the PCIe interface to interrupt numbers.

		Optional properties:
		- msi-parent: Link to the hardware entity that serves as the MSI controller for this PCIe
		controller.
		- msi-parent: Link to the hardware entity that serves as the MSI controller
		for this PCIe controller.
		- bus-range: PCI bus numbers covered

		Example

Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -6,7 +6,7 @@ and thus inherits all the common properties defined in designware-pcie.txt.
		Required properties:
		- compatible: "axis,artpec6-pcie", "snps,dw-pcie"
		- reg: base addresses and lengths of the PCIe controller (DBI),
		the phy controller, and configuration address space.
		the PHY controller, and configuration address space.
		- reg-names: Must include the following entries:
		- "dbi"
		- "phy"

Documentation/devicetree/bindings/pci/designware-pcie.txt

+11 −13

Original line number	Diff line number	Diff line
		* Synopsys Designware PCIe interface
		* Synopsys DesignWare PCIe interface

		Required properties:
		- compatible: should contain "snps,dw-pcie" to identify the core.
		@@ -17,29 +17,27 @@ RC mode:
		properties to define the mapping of the PCIe interface to interrupt
		numbers.
		EP mode:
		- num-ib-windows: number of inbound address translation
		windows
		- num-ob-windows: number of outbound address translation
		windows
		- num-ib-windows: number of inbound address translation windows
		- num-ob-windows: number of outbound address translation windows

		Optional properties:
		- num-lanes: number of lanes to use (this property should be specified unless
		the link is brought already up in BIOS)
		- reset-gpio: gpio pin number of power good signal
		- reset-gpio: GPIO pin number of power good signal
		- clocks: Must contain an entry for each entry in clock-names.
		See ../clocks/clock-bindings.txt for details.
		- clock-names: Must include the following entries:
		- "pcie"
		- "pcie_bus"
		RC mode:
		- num-viewport: number of view ports configured in
		hardware. If a platform does not specify it, the driver assumes 2.
		- bus-range: PCI bus numbers covered (it is recommended
		for new devicetrees to specify this property, to keep backwards
		compatibility a range of 0x00-0xff is assumed if not present)
		- num-viewport: number of view ports configured in hardware. If a platform
		does not specify it, the driver assumes 2.
		- bus-range: PCI bus numbers covered (it is recommended for new devicetrees
		to specify this property, to keep backwards compatibility a range of
		0x00-0xff is assumed if not present)

		EP mode:
		- max-functions: maximum number of functions that can be
		configured
		- max-functions: maximum number of functions that can be configured

		Example configuration: