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Commit 0ce77802 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'bnx2x-next'



Yuval Mintz says:

====================
bnx2x: Support new Multi-function modes

This patch series adds support for 2 new Multi-function modes -
Unified Fabric Port [UFP] as well as nic partitioning 1.5 [NPAR1.5].

With the addition of the new multi-function modes, the series also
revises some of the storage-related multi-function macros.

[Do notice this series has several small issues with checkpatch]
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 77f4f622 83bad206
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+46 −7
Original line number Diff line number Diff line
@@ -1448,6 +1448,12 @@ struct bnx2x_fp_stats {
	struct bnx2x_eth_q_stats_old eth_q_stats_old;
};

enum {
	SUB_MF_MODE_UNKNOWN = 0,
	SUB_MF_MODE_UFP,
	SUB_MF_MODE_NPAR1_DOT_5,
};

struct bnx2x {
	/* Fields used in the tx and intr/napi performance paths
	 * are grouped together in the beginning of the structure
@@ -1659,6 +1665,9 @@ struct bnx2x {
#define IS_MF_SI(bp)		(bp->mf_mode == MULTI_FUNCTION_SI)
#define IS_MF_SD(bp)		(bp->mf_mode == MULTI_FUNCTION_SD)
#define IS_MF_AFEX(bp)		(bp->mf_mode == MULTI_FUNCTION_AFEX)
	u8			mf_sub_mode;
#define IS_MF_UFP(bp)		(IS_MF_SD(bp) && \
				 bp->mf_sub_mode == SUB_MF_MODE_UFP)

	u8			wol;

@@ -2361,7 +2370,7 @@ void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func, u8 idu_sb_id,
#define ATTN_HARD_WIRED_MASK		0xff00
#define ATTENTION_ID			4

#define IS_MF_STORAGE_ONLY(bp) (IS_MF_STORAGE_SD(bp) || \
#define IS_MF_STORAGE_ONLY(bp) (IS_MF_STORAGE_PERSONALITY_ONLY(bp) || \
				 IS_MF_FCOE_AFEX(bp))

/* stuff added to make the code fit 80Col */
@@ -2537,15 +2546,45 @@ void bnx2x_notify_link_changed(struct bnx2x *bp);

#define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp))
#define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp))
#define IS_MF_ISCSI_SI(bp) (IS_MF_SI(bp) && BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp))

#define BNX2X_MF_EXT_PROTOCOL_FCOE(bp)  ((bp)->mf_ext_config & \
#define IS_MF_ISCSI_ONLY(bp)    (IS_MF_ISCSI_SD(bp) ||  IS_MF_ISCSI_SI(bp))

#define BNX2X_MF_EXT_PROTOCOL_MASK					\
				(MACP_FUNC_CFG_FLAGS_ETHERNET |		\
				 MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD |	\
				 MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)

#define IS_MF_FCOE_AFEX(bp) (IS_MF_AFEX(bp) && BNX2X_MF_EXT_PROTOCOL_FCOE(bp))
#define IS_MF_STORAGE_SD(bp) (IS_MF_SD(bp) && \
#define BNX2X_MF_EXT_PROT(bp)	((bp)->mf_ext_config &			\
				 BNX2X_MF_EXT_PROTOCOL_MASK)

#define BNX2X_HAS_MF_EXT_PROTOCOL_FCOE(bp)				\
		(BNX2X_MF_EXT_PROT(bp) & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)

#define BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp)				\
		(BNX2X_MF_EXT_PROT(bp) == MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD)

#define BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp)				\
		(BNX2X_MF_EXT_PROT(bp) == MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD)

#define IS_MF_FCOE_AFEX(bp)						\
		(IS_MF_AFEX(bp) && BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp))

#define IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp)				\
				(IS_MF_SD(bp) &&			\
				 (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) ||	\
				  BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)))

#define IS_MF_SI_STORAGE_PERSONALITY_ONLY(bp)				\
				(IS_MF_SI(bp) &&			\
				 (BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp) ||	\
				  BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp)))

#define IS_MF_STORAGE_PERSONALITY_ONLY(bp)				\
			(IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp) ||	\
			 IS_MF_SI_STORAGE_PERSONALITY_ONLY(bp))


#define SET_FLAG(value, mask, flag) \
	do {\
		(value) &= ~(mask);\
+5 −7
Original line number Diff line number Diff line
@@ -1938,7 +1938,7 @@ void bnx2x_set_num_queues(struct bnx2x *bp)
	bp->num_ethernet_queues = bnx2x_calc_num_queues(bp);

	/* override in STORAGE SD modes */
	if (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))
	if (IS_MF_STORAGE_ONLY(bp))
		bp->num_ethernet_queues = 1;

	/* Add special queues */
@@ -4231,14 +4231,13 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p)
	struct bnx2x *bp = netdev_priv(dev);
	int rc = 0;

	if (!bnx2x_is_valid_ether_addr(bp, addr->sa_data)) {
	if (!is_valid_ether_addr(addr->sa_data)) {
		BNX2X_ERR("Requested MAC address is not valid\n");
		return -EINVAL;
	}

	if ((IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp)) &&
	    !is_zero_ether_addr(addr->sa_data)) {
		BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n");
	if (IS_MF_STORAGE_ONLY(bp)) {
		BNX2X_ERR("Can't change address on STORAGE ONLY function\n");
		return -EINVAL;
	}

@@ -4417,8 +4416,7 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
	u8 cos;
	int rx_ring_size = 0;

	if (!bp->rx_ring_size &&
	    (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {
	if (!bp->rx_ring_size && IS_MF_STORAGE_ONLY(bp)) {
		rx_ring_size = MIN_RX_SIZE_NONTPA;
		bp->rx_ring_size = rx_ring_size;
	} else if (!bp->rx_ring_size) {
+6 −8
Original line number Diff line number Diff line
@@ -936,6 +936,12 @@ static inline int bnx2x_func_start(struct bnx2x *bp)
	start_params->gre_tunnel_type	= IPGRE_TUNNEL;
	start_params->inner_gre_rss_en	= 1;

	if (IS_MF_UFP(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) {
		start_params->class_fail_ethtype = ETH_P_FIP;
		start_params->class_fail = 1;
		start_params->no_added_tags = 1;
	}

	return bnx2x_func_state_change(bp, &func_params);
}

@@ -1298,15 +1304,7 @@ static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)
	}
}

static inline bool bnx2x_is_valid_ether_addr(struct bnx2x *bp, u8 *addr)
{
	if (is_valid_ether_addr(addr) ||
	    (is_zero_ether_addr(addr) &&
	     (IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))))
		return true;

	return false;
}

/**
 * bnx2x_fill_fw_str - Fill buffer with FW version string
+1 −1
Original line number Diff line number Diff line
@@ -1852,7 +1852,7 @@ static int bnx2x_set_ringparam(struct net_device *dev,
	if ((ering->rx_pending > MAX_RX_AVAIL) ||
	    (ering->rx_pending < (bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
						    MIN_RX_SIZE_TPA)) ||
	    (ering->tx_pending > (IS_MF_FCOE_AFEX(bp) ? 0 : MAX_TX_AVAIL)) ||
	    (ering->tx_pending > (IS_MF_STORAGE_ONLY(bp) ? 0 : MAX_TX_AVAIL)) ||
	    (ering->tx_pending <= MAX_SKB_FRAGS + 4)) {
		DP(BNX2X_MSG_ETHTOOL, "Command parameters not supported\n");
		return -EINVAL;
+17 −11
Original line number Diff line number Diff line
@@ -280,17 +280,11 @@ struct shared_hw_cfg { /* NVRAM Offset */
		#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_BOTH          0x60000000
		#define SHARED_HW_CFG_MDC_MDIO_ACCESS2_SWAPPED       0x80000000


	u32 power_dissipated;			/* 0x11c */
	#define SHARED_HW_CFG_POWER_MGNT_SCALE_MASK         0x00ff0000
		#define SHARED_HW_CFG_POWER_MGNT_SCALE_SHIFT         16
		#define SHARED_HW_CFG_POWER_MGNT_UNKNOWN_SCALE       0x00000000
		#define SHARED_HW_CFG_POWER_MGNT_DOT_1_WATT          0x00010000
		#define SHARED_HW_CFG_POWER_MGNT_DOT_01_WATT         0x00020000
		#define SHARED_HW_CFG_POWER_MGNT_DOT_001_WATT        0x00030000

	#define SHARED_HW_CFG_POWER_DIS_CMN_MASK            0xff000000
	#define SHARED_HW_CFG_POWER_DIS_CMN_SHIFT                    24
	u32 config_3;				/* 0x11C */
	#define SHARED_HW_CFG_EXTENDED_MF_MODE_MASK         0x00000F00
		#define SHARED_HW_CFG_EXTENDED_MF_MODE_SHIFT              8
		#define SHARED_HW_CFG_EXTENDED_MF_MODE_NPAR1_DOT_5        0x00000000
		#define SHARED_HW_CFG_EXTENDED_MF_MODE_NPAR2_DOT_0        0x00000100

	u32 ump_nc_si_config;			/* 0x120 */
	#define SHARED_HW_CFG_UMP_NC_SI_MII_MODE_MASK       0x00000003
@@ -859,6 +853,8 @@ struct shared_feat_cfg { /* NVRAM Offset */
		#define SHARED_FEAT_CFG_FORCE_SF_MODE_SPIO4          0x00000200
		#define SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT  0x00000300
		#define SHARED_FEAT_CFG_FORCE_SF_MODE_AFEX_MODE      0x00000400
		#define SHARED_FEAT_CFG_FORCE_SF_MODE_UFP_MODE       0x00000600
		#define SHARED_FEAT_CFG_FORCE_SF_MODE_EXTENDED_MODE  0x00000700

	/* The interval in seconds between sending LLDP packets. Set to zero
	   to disable the feature */
@@ -1268,6 +1264,10 @@ struct drv_func_mb {
	#define DRV_MSG_CODE_GET_UPGRADE_KEY            0x81000000
	#define DRV_MSG_CODE_GET_MANUF_KEY              0x82000000
	#define DRV_MSG_CODE_LOAD_L2B_PRAM              0x90000000
	#define DRV_MSG_CODE_OEM_OK			0x00010000
	#define DRV_MSG_CODE_OEM_FAILURE		0x00020000
	#define DRV_MSG_CODE_OEM_UPDATE_SVID_OK		0x00030000
	#define DRV_MSG_CODE_OEM_UPDATE_SVID_FAILURE	0x00040000
	/*
	 * The optic module verification command requires bootcode
	 * v5.0.6 or later, te specific optic module verification command
@@ -1423,6 +1423,12 @@ struct drv_func_mb {
	#define DRV_STATUS_SET_MF_BW                    0x00000004
	#define DRV_STATUS_LINK_EVENT                   0x00000008

	#define DRV_STATUS_OEM_EVENT_MASK               0x00000070
	#define DRV_STATUS_OEM_DISABLE_ENABLE_PF        0x00000010
	#define DRV_STATUS_OEM_BANDWIDTH_ALLOCATION     0x00000020

	#define DRV_STATUS_OEM_UPDATE_SVID              0x00000080

	#define DRV_STATUS_DCC_EVENT_MASK               0x0000ff00
	#define DRV_STATUS_DCC_DISABLE_ENABLE_PF        0x00000100
	#define DRV_STATUS_DCC_BANDWIDTH_ALLOCATION     0x00000200
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