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Commit 0b47759d authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Paul Mackerras
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[POWERPC] Fix 8xx build breakage due to _tlbie changes



My changes to _tlbie to fix 4xx unfortunately broke 8xx build in a
couple of places.  This fixes it.

Spotted by Olof Johansson.

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarVitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 072ef40e
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+1 −1
Original line number Diff line number Diff line
@@ -464,7 +464,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
		 * we invalidate the TLB here, thus avoiding dcbst
		 * misbehaviour.
		 */
		_tlbie(address);
		_tlbie(address, 0 /* 8xx doesn't care about PID */);
#endif
		if (!PageReserved(page)
		    && !test_bit(PG_arch_1, &page->flags)) {
+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ extern unsigned long total_lowmem;
 * architectures.  -- Dan
 */
#if defined(CONFIG_8xx)
#define flush_HPTE(X, va, pg)	_tlbie(va)
#define flush_HPTE(X, va, pg)	_tlbie(va, 0 /* 8xx doesn't care about PID */)
#define MMU_init_hw()		do { } while(0)
#define mmu_mapin_ram()		(0UL)

+1 −1
Original line number Diff line number Diff line
@@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
		 * That means the zeroed TLB has to be invalidated
		 * whenever a page miss occurs.
		 */
		_tlbie(address);
		_tlbie(address, 0 /* 8xx doesn't care about PID */);
#endif
		if (!PageReserved(page)
		    && !test_bit(PG_arch_1, &page->flags)) {
+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries;
 * architectures.  -- Dan
 */
#if defined(CONFIG_8xx)
#define flush_HPTE(X, va, pg)	_tlbie(va)
#define flush_HPTE(X, va, pg)	_tlbie(va, 0 /* 8xx doesn't care about PID */)
#define MMU_init_hw()		do { } while(0)
#define mmu_mapin_ram()		(0UL)