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Commit 0af5107c authored by Talat Batheesh's avatar Talat Batheesh Committed by Leon Romanovsky
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net/mlx5: Add RoCE RX ICRC encapsulated counter 



Add capability bit in PCAM register and RoCE ICRC error counter
to PPCNT register.

Signed-off-by: default avatarTalat Batheesh <talatb@mellanox.com>
Reviewed-by: default avatarMark Bloch <markb@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
parent 38b7ca92

include/linux/mlx5/mlx5_ifc.h

+8 −3
Original line number Diff line number Diff line
@@ -1681,7 +1681,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits { 


	u8         rx_buffer_full_low[0x20];



	u8         reserved_at_1c0[0x600];

	u8         rx_icrc_encapsulated_high[0x20];



	u8         rx_icrc_encapsulated_low[0x20];



	u8         reserved_at_200[0x5c0];

};



struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
@@ -8044,8 +8048,9 @@ struct mlx5_ifc_peir_reg_bits { 
};



struct mlx5_ifc_pcam_enhanced_features_bits {

	u8         reserved_at_0[0x76];



	u8         reserved_at_0[0x6d];

	u8         rx_icrc_encapsulated_counter[0x1];

	u8	   reserved_at_6e[0x8];

	u8         pfcc_mask[0x1];

	u8         reserved_at_77[0x4];

	u8         rx_buffer_fullness_counters[0x1];