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Commit 0a2ce62b authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Felipe Balbi
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usb: renesas_usbhs: fix usbhsf_fifo_clear() for RX direction 



This patch fixes an issue that the usbhsf_fifo_clear() is possible
to cause 10 msec delay if the pipe is RX direction and empty because
the FRDY bit will never be set to 1 in such case.

Fixes: e8d548d5 ("usb: renesas_usbhs: fifo became independent from pipe.")
Cc: <stable@vger.kernel.org> # v3.1+
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 6124607a

drivers/usb/renesas_usbhs/fifo.c

+11 −2
Original line number Diff line number Diff line
@@ -284,8 +284,17 @@ static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, 
	struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);

	int ret = 0;



	if (!usbhs_pipe_is_dcp(pipe))

	if (!usbhs_pipe_is_dcp(pipe)) {

		/*

		 * This driver checks the pipe condition first to avoid -EBUSY

		 * from usbhsf_fifo_barrier() with about 10 msec delay in

		 * the interrupt handler if the pipe is RX direction and empty.

		 */

		if (usbhs_pipe_is_dir_in(pipe))

			ret = usbhs_pipe_is_accessible(pipe);

		if (!ret)

			ret = usbhsf_fifo_barrier(priv, fifo);

	}



	/*

	 * if non-DCP pipe, this driver should set BCLR when