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Commit 08eda32b authored by Christian König's avatar Christian König Committed by Alex Deucher
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drm/radeon: fix header size estimation in VM code 



Only NI uses 3dw headers, SI uses 4dw headers.

Signed-off-by: default avatarChristian König <deathsimple@vodafone.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 204a393c

drivers/gpu/drm/radeon/radeon_gart.c

+3 −3
Original line number Diff line number Diff line
@@ -1147,17 +1147,17 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, 


	if (RADEON_VM_BLOCK_SIZE > 11)

		/* reserve space for one header for every 2k dwords */

		ndw += (nptes >> 11) * 3;

		ndw += (nptes >> 11) * 4;

	else

		/* reserve space for one header for

		    every (1 << BLOCK_SIZE) entries */

		ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 3;

		ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4;



	/* reserve space for pte addresses */

	ndw += nptes * 2;



	/* reserve space for one header for every 2k dwords */

	ndw += (npdes >> 11) * 3;

	ndw += (npdes >> 11) * 4;



	/* reserve space for pde addresses */

	ndw += npdes * 2;