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Commit 07d17f09 authored by Ralf Baechle's avatar Ralf Baechle
Browse files

Merge branch '4.4-fixes' into mips-for-linux-next

parents dbb98314 2549cc96

arch/mips/include/asm/io.h

+1 −0
Original line number Diff line number Diff line
@@ -275,6 +275,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si 
 */

#define ioremap_cachable(offset, size)					\

	__ioremap_mode((offset), (size), _page_cachable_default)

#define ioremap_cache ioremap_cachable



/*

 * These two are MIPS specific ioremap variant.	 ioremap_cacheable_cow

arch/mips/include/asm/mips-cm.h

+4 −0
Original line number Diff line number Diff line
@@ -243,6 +243,10 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80) 
#define  CM_GCR_BASE_CMDEFTGT_IOCU0		2

#define  CM_GCR_BASE_CMDEFTGT_IOCU1		3



/* GCR_RESET_EXT_BASE register fields */

#define CM_GCR_RESET_EXT_BASE_EVARESET		BIT(31)

#define CM_GCR_RESET_EXT_BASE_UEB		BIT(30)



/* GCR_ACCESS register fields */

#define CM_GCR_ACCESS_ACCESSEN_SHF		0

#define CM_GCR_ACCESS_ACCESSEN_MSK		(_ULCAST_(0xff) << 0)

arch/mips/include/asm/page.h

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ 
#define PAGE_SHIFT	16

#endif

#define PAGE_SIZE	(_AC(1,UL) << PAGE_SHIFT)

#define PAGE_MASK	(~(PAGE_SIZE - 1))

#define PAGE_MASK	(~((1 << PAGE_SHIFT) - 1))



/*

 * This is used for calculating the real page sizes

arch/mips/kernel/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -623,7 +623,7 @@ static void __init request_crashkernel(struct resource *res) 


#define USE_PROM_CMDLINE	IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER)

#define USE_DTB_CMDLINE		IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB)

#define EXTEND_WITH_PROM	IS_ENABLED(CONFIG_MIPS_CMDLINE_EXTEND)

#define EXTEND_WITH_PROM	IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND)



static void __init arch_mem_init(char **cmdline_p)

{

arch/mips/kernel/smp-cps.c

+3 −0
Original line number Diff line number Diff line
@@ -202,6 +202,9 @@ static void boot_core(unsigned core) 
	/* Ensure its coherency is disabled */

	write_gcr_co_coherence(0);



	/* Start it with the legacy memory map and exception base */

	write_gcr_co_reset_ext_base(CM_GCR_RESET_EXT_BASE_UEB);



	/* Ensure the core can access the GCRs */

	access = read_gcr_access();

	access |= 1 << (CM_GCR_ACCESS_ACCESSEN_SHF + core);