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Commit 070d9a93 authored by Thierry Reding's avatar Thierry Reding
Browse files

Merge branch 'for-4.8/drivers' into for-next

parents bd268612 1f0d3bb0

Documentation/devicetree/bindings/pwm/brcm,iproc-pwm.txt

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Broadcom iProc PWM controller device tree bindings



This controller has 4 channels.



Required Properties :

- compatible: must be "brcm,iproc-pwm"

- reg: physical base address and length of the controller's registers

- clocks: phandle + clock specifier pair for the external clock

- #pwm-cells: Should be 3. See pwm.txt in this directory for a

  description of the cells format.



Refer to clocks/clock-bindings.txt for generic clock consumer properties.



Example:



pwm: pwm@18031000 {

	compatible = "brcm,iproc-pwm";

	reg = <0x18031000 0x28>;

	clocks = <&osc>;

	#pwm-cells = <3>;

};

Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt

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* PWM controlled by ChromeOS EC



Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller

(EC) and controlled via a host-command interface.



An EC PWM node should be only found as a sub-node of the EC node (see

Documentation/devicetree/bindings/mfd/cros-ec.txt).



Required properties:

- compatible: Must contain "google,cros-ec-pwm"

- #pwm-cells: Should be 1. The cell specifies the PWM index.



Example:

	cros-ec@0 {

		compatible = "google,cros-ec-spi";



		...



		cros_ec_pwm: ec-pwm {

			compatible = "google,cros-ec-pwm";

			#pwm-cells = <1>;

		};

	};

Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt

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Tegra SoC PWFM controller



Required properties:

- compatible: For Tegra20, must contain "nvidia,tegra20-pwm".  For Tegra30,

  must contain "nvidia,tegra30-pwm".  Otherwise, must contain

  "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114,

  tegra124, tegra132, or tegra210.

- compatible: Must be:

  - "nvidia,tegra20-pwm": for Tegra20

  - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30

  - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114

  - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124

  - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132

  - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210

  - "nvidia,tegra186-pwm": for Tegra186

- reg: physical base address and length of the controller's registers

- #pwm-cells: should be 2. See pwm.txt in this directory for a description of

  the cells format.

Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt

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@@ -15,14 +15,14 @@ Optional properties: 


Example:



ehrpwm0: ehrpwm@0 { /* EHRPWM on am33xx */

ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */

	compatible = "ti,am33xx-ehrpwm";

	#pwm-cells = <3>;

	reg = <0x48300200 0x100>;

	ti,hwmods = "ehrpwm0";

};



ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */

ehrpwm0: pwm@300000 { /* EHRPWM on da850 */

	compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";

	#pwm-cells = <3>;

	reg = <0x300000 0x2000>;

Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt

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@@ -7,6 +7,7 @@ Required Properties: 
 - "renesas,pwm-r8a7790": for R-Car H2

 - "renesas,pwm-r8a7791": for R-Car M2-W

 - "renesas,pwm-r8a7794": for R-Car E2

 - "renesas,pwm-r8a7795": for R-Car H3

- reg: base address and length of the registers block for the PWM.

- #pwm-cells: should be 2. See pwm.txt in this directory for a description of

  the cells format.