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Commit 05e6d232 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-dt2-for-v4.1' of... 

Merge tag 'renesas-dt2-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.1" from Simon Horman:

* ape6evm board
  - Configure GPIO keys as wake-up source
  - Enable pull-up for GPIO switches
  - Correct polarity of LEDs
* r8a7791 SoC
  - Correct IPMMU-GP clock to device tree
* r8a7794 SoC
  - Correct ethernet controller PHY IRQ
* lager, koelsch and marzen boards
  - Add DU external pixel clock to DT
* lager board
  - Add HDMI output support to DT
* r8a7791 and r8a7790 SoCs
  - Tidy up SDHI register size in DT
  - Reference DMA channels for SDHI in DT

* tag 'renesas-dt2-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: ape6evm dts: Configure the custom switch as wake-up source
  ARM: shmobile: ape6evm dts: Enable pull-up for GPIO switches
  ARM: shmobile: r8a7791: Fix IPMMU-GP clock to device tree
  ARM: shmobile: r8a7794: alt: Fix ethernet controller PHY IRQ line
  ARM: shmobile: lager: Add DU external pixel clocks to DT
  ARM: shmobile: koelsch: Add DU external pixel clocks to DT
  ARM: shmobile: marzen: Add DU external pixel clock to DT
  ARM: shmobile: ape6evm dts: Fix polarity of LEDs
  ARM: shmobile: lager: Add DU HDMI output support
  ARM: shmobile: r8a7791: Fix HSUSB clock to hp_clk from mp_clk
  ARM: shmobile: r8a7790: Fix HSUSB clock to hp_clk from mp_clk
  ARM: shmobile: r8a7791: tidyup SDHI register size on DTSI
  ARM: shmobile: r8a7790: tidyup SDHI register size on DTSI
  ARM: shmobile: r8a7791: Reference DMA channels in SDHI DT nodes
  ARM: shmobile: r8a7790: Reference DMA channels in SDHI DT nodes
parents 094a29d0 90ca409a

arch/arm/boot/dts/r8a73a4-ape6evm.dts

+16 −6
Original line number Diff line number Diff line
@@ -95,27 +95,27 @@ 
	leds {

		compatible = "gpio-leds";

		led1 {

			gpios = <&pfc 28 GPIO_ACTIVE_LOW>;

			gpios = <&pfc 28 GPIO_ACTIVE_HIGH>;

			label = "GNSS_EN";

		};

		led2 {

			gpios = <&pfc 126 GPIO_ACTIVE_LOW>;

			gpios = <&pfc 126 GPIO_ACTIVE_HIGH>;

			label = "NFC_NRST";

		};

		led3 {

			gpios = <&pfc 132 GPIO_ACTIVE_LOW>;

			gpios = <&pfc 132 GPIO_ACTIVE_HIGH>;

			label = "GNSS_NRST";

		};

		led4 {

			gpios = <&pfc 232 GPIO_ACTIVE_LOW>;

			gpios = <&pfc 232 GPIO_ACTIVE_HIGH>;

			label = "BT_WAKEUP";

		};

		led5 {

			gpios = <&pfc 250 GPIO_ACTIVE_LOW>;

			gpios = <&pfc 250 GPIO_ACTIVE_HIGH>;

			label = "STROBE";

		};

		led6 {

			gpios = <&pfc 288 GPIO_ACTIVE_LOW>;

			gpios = <&pfc 288 GPIO_ACTIVE_HIGH>;

			label = "BBRESETOUT";

		};

	};
@@ -123,10 +123,14 @@ 
	keyboard {

		compatible = "gpio-keys";



		pinctrl-names = "default";

		pinctrl-0 = <&keyboard_pins>;



		zero-key {

			gpios = <&pfc 324 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_0>;

			label = "S16";

			gpio-key,wakeup;

		};



		menu-key {
@@ -208,6 +212,12 @@ 
		renesas,groups = "sdhi1_data4", "sdhi1_ctrl";

		renesas,function = "sdhi1";

	};



	keyboard_pins: keyboard {

		renesas,pins = "PORT324", "PORT325", "PORT326", "PORT327",

			       "PORT328", "PORT329";

		bias-pull-up;

	};

};



&mmcif0 {

arch/arm/boot/dts/r8a7779-marzen.dts

+9 −0
Original line number Diff line number Diff line
@@ -122,6 +122,12 @@ 
			};

		};

	};



	x3_clk: x3-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <65000000>;

	};

};



&du {
@@ -129,6 +135,9 @@ 
	pinctrl-names = "default";

	status = "okay";



	clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;

	clock-names = "du", "dclkin.0";



	ports {

		port@0 {

			endpoint {

arch/arm/boot/dts/r8a7790-lager.dts

+69 −0
Original line number Diff line number Diff line
@@ -222,6 +222,29 @@ 
			};

		};

	};



	hdmi-out {

		compatible = "hdmi-connector";

		type = "a";



		port {

			hdmi_con: endpoint {

				remote-endpoint = <&adv7511_out>;

			};

		};

	};



	x2_clk: x2-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <148500000>;

	};



	x13_clk: x13-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <148500000>;

	};

};



&du {
@@ -229,12 +252,26 @@ 
	pinctrl-names = "default";

	status = "okay";



	clocks = <&mstp7_clks R8A7790_CLK_DU0>,

		 <&mstp7_clks R8A7790_CLK_DU1>,

		 <&mstp7_clks R8A7790_CLK_DU2>,

		 <&mstp7_clks R8A7790_CLK_LVDS0>,

		 <&mstp7_clks R8A7790_CLK_LVDS1>,

		 <&x13_clk>, <&x2_clk>;

	clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1",

		      "dclkin.0", "dclkin.1";



	ports {

		port@0 {

			endpoint {

				remote-endpoint = <&adv7123_in>;

			};

		};

		port@1 {

			endpoint {

				remote-endpoint = <&adv7511_in>;

			};

		};

		port@2 {

			lvds_connector: endpoint {

			};
@@ -506,6 +543,38 @@ 
			};

		};

	};



	hdmi@39 {

		compatible = "adi,adv7511w";

		reg = <0x39>;

		interrupt-parent = <&gpio1>;

		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;



		adi,input-depth = <8>;

		adi,input-colorspace = "rgb";

		adi,input-clock = "1x";

		adi,input-style = <1>;

		adi,input-justification = "evenly";



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@0 {

				reg = <0>;

				adv7511_in: endpoint {

					remote-endpoint = <&du_out_lvds0>;

				};

			};



			port@1 {

				reg = <1>;

				adv7511_out: endpoint {

					remote-endpoint = <&hdmi_con>;

				};

			};

		};

	};

};



&iic3 {

arch/arm/boot/dts/r8a7790.dtsi

+12 −3
Original line number Diff line number Diff line 
/*

 * Device Tree Source for the r8a7790 SoC

 *

 * Copyright (C) 2015 Renesas Electronics Corporation

 * Copyright (C) 2013-2014 Renesas Solutions Corp.

 * Copyright (C) 2014 Cogent Embedded Inc.

 *
@@ -493,17 +494,21 @@ 


	sdhi0: sd@ee100000 {

		compatible = "renesas,sdhi-r8a7790";

		reg = <0 0xee100000 0 0x200>;

		reg = <0 0xee100000 0 0x328>;

		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;

		dmas = <&dmac1 0xcd>, <&dmac1 0xce>;

		dma-names = "tx", "rx";

		status = "disabled";

	};



	sdhi1: sd@ee120000 {

		compatible = "renesas,sdhi-r8a7790";

		reg = <0 0xee120000 0 0x200>;

		reg = <0 0xee120000 0 0x328>;

		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;

		dmas = <&dmac1 0xc9>, <&dmac1 0xca>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -512,6 +517,8 @@ 
		reg = <0 0xee140000 0 0x100>;

		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;

		dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -520,6 +527,8 @@ 
		reg = <0 0xee160000 0 0x100>;

		interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;

		dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;

		dma-names = "tx", "rx";

		status = "disabled";

	};
@@ -1173,7 +1182,7 @@ 
		mstp7_clks: mstp7_clks@e615014c {

			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;

			clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,

			clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,

				 <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,

				 <&zx_clk>;

			#clock-cells = <1>;

arch/arm/boot/dts/r8a7791-koelsch.dts

+19 −0
Original line number Diff line number Diff line
@@ -269,6 +269,18 @@ 
			};

		};

	};



	x2_clk: x2-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <148500000>;

	};



	x13_clk: x13-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <148500000>;

	};

};



&du {
@@ -276,6 +288,13 @@ 
	pinctrl-names = "default";

	status = "okay";



	clocks = <&mstp7_clks R8A7791_CLK_DU0>,

		 <&mstp7_clks R8A7791_CLK_DU1>,

		 <&mstp7_clks R8A7791_CLK_LVDS0>,

		 <&x13_clk>, <&x2_clk>;

	clock-names = "du.0", "du.1", "lvds.0",

		      "dclkin.0", "dclkin.1";



	ports {

		port@0 {

			endpoint {