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Commit 0583fe47 authored by Rob Herring's avatar Rob Herring
Browse files

ARM: convert arm/arm64 arch timer to use CLKSRC_OF init 



This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow for
arch specific setup.

This has a side effect of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent f414f13f

arch/arm/include/asm/arch_timer.h

+1 −12
Original line number Diff line number Diff line
@@ -10,8 +10,7 @@ 
#include <clocksource/arm_arch_timer.h>



#ifdef CONFIG_ARM_ARCH_TIMER

int arch_timer_of_register(void);

int arch_timer_sched_clock_init(void);

int arch_timer_arch_init(void);



/*

 * These register accessors are marked inline so the compiler can
@@ -110,16 +109,6 @@ static inline void __cpuinit arch_counter_set_user_access(void) 


	asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));

}

#else

static inline int arch_timer_of_register(void)

{

	return -ENXIO;

}



static inline int arch_timer_sched_clock_init(void)

{

	return -ENXIO;

}

#endif



#endif

arch/arm/kernel/arch_timer.c

+3 −14
Original line number Diff line number Diff line
@@ -39,26 +39,15 @@ static void __init arch_timer_delay_timer_register(void) 
	register_current_timer_delay(&arch_delay_timer);

}



int __init arch_timer_of_register(void)

{

	int ret;



	ret = arch_timer_init();

	if (ret)

		return ret;



	arch_timer_delay_timer_register();



	return 0;

}



int __init arch_timer_sched_clock_init(void)

int __init arch_timer_arch_init(void)

{

        u32 arch_timer_rate = arch_timer_get_rate();



	if (arch_timer_rate == 0)

		return -ENXIO;



	arch_timer_delay_timer_register();



	/* Cache the sched_clock multiplier to save a divide in the hot path. */

	sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;

	sched_clock_func = arch_timer_sched_clock;

arch/arm/mach-exynos/mach-exynos5-dt.c

+0 −1
Original line number Diff line number Diff line
@@ -216,7 +216,6 @@ DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") 
	.map_io		= exynos5_dt_map_io,

	.init_machine	= exynos5_dt_machine_init,

	.init_late	= exynos_init_late,

	.init_time	= exynos4_timer_init,

	.dt_compat	= exynos5_dt_compat,

	.restart        = exynos5_restart,

	.reserve	= exynos5_reserve,

arch/arm/mach-exynos/mct.c

+0 −6
Original line number Diff line number Diff line
@@ -21,7 +21,6 @@ 
#include <linux/percpu.h>

#include <linux/of.h>



#include <asm/arch_timer.h>

#include <asm/localtimer.h>



#include <plat/cpu.h>
@@ -469,11 +468,6 @@ static void __init exynos4_timer_resources(void) 


void __init exynos4_timer_init(void)

{

	if (soc_is_exynos5440()) {

		arch_timer_of_register();

		return;

	}



	if ((soc_is_exynos4210()) || (soc_is_exynos5250()))

		mct_int_type = MCT_INT_SPI;

	else

arch/arm/mach-highbank/highbank.c

+1 −4
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
 */

#include <linux/clk.h>

#include <linux/clkdev.h>

#include <linux/clocksource.h>

#include <linux/dma-mapping.h>

#include <linux/io.h>

#include <linux/irq.h>
@@ -28,7 +29,6 @@ 
#include <linux/amba/bus.h>

#include <linux/clk-provider.h>



#include <asm/arch_timer.h>

#include <asm/cacheflush.h>

#include <asm/cputype.h>

#include <asm/smp_plat.h>
@@ -118,9 +118,6 @@ static void __init highbank_timer_init(void) 
	sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");

	sp804_clockevents_init(timer_base, irq, "timer0");



	arch_timer_of_register();

	arch_timer_sched_clock_init();



	clocksource_of_init();

}