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Commit 04136309 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi into next/dt64 

Pull "ARM64: DT: Hisilicon Hi6220 soc and hikey board updates for 4.7" from Wei Xu

- Reserve memory regions for Hi6220
- Add sp804 timer node for Hi6220
- Add cpu and cluster level's low power state for Hi6220
- Add gpio configuration nodes for Hi6220
- Add pinctrl configuration nodes for Hi6220
- Add spi related nodes for Hi6220
- Add i2c nodes for Hi6220
- Add i2c nodes to work with mezzanine boards
- Add usb nodes for Hi6220
- Add mailobx node for Hi6220
- Add SRAM node and stub clock node for Hi6220
- Add pinctrl nodes for uarts and enable them
- Add LED nodes for hi6220-hikey board
- Add hi655x pmic node for Hi6220
- Add dwmmc nodes for Hi6220
- Add wifi nodes support for Hi6220-Hikey board
- Register thermal sensor for Hi6220
- Register Hi6220's thermal zone for power allocator
- Add L2 cache topology for Hi6220

* tag 'hi6220-dt-for-4.7' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: Add L2 cache topology to Hi6220
  arm64: dts: register Hi6220's thermal zone for power allocator
  arm64: dts: register Hi6220's thermal sensor
  arm64: dts: add wifi nodes support for hi6220-hikey
  arm64: dts: add dwmmc nodes for hi6220
  arm64: dts: hikey: Add hi655x pmic dts node
  arm64: dts: add LED nodes for hi6220-hikey
  arm64: dts: hi6220: add pinctrl for uarts and enable them
  arm64: dts: add Hi6220's stub clock node
  arm64: dts: add mailbox node for Hi6220
  arm64: dts: Add hi6220 usb node
  arm64: dts: hikey: enable i2c0 and i2c1 for working with mezzanine boards
  arm64: dts: add all hi6220 i2c nodes
  arm64: dts: add Hi6220 spi configuration nodes
  arm64: dts: add Hi6220 pinctrl configuration nodes
  arm64: dts: Add Hi6220 gpio configuration nodes
  arm64: dts: enable idle states for Hi6220
  arm64: dts: add sp804 timer node for Hi6220
  arm64: dts: Reserve memory regions for hi6220
parents 408e8fc8 64851603

arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts

+195 −5
Original line number Diff line number Diff line
@@ -6,11 +6,9 @@ 
 */



/dts-v1/;



/*Reserved 1MB memory for MCU*/

/memreserve/ 0x05e00000 0x00100000;



#include "hi6220.dtsi"

#include "hikey-pinctrl.dtsi"

#include <dt-bindings/gpio/gpio.h>



/ {

	model = "HiKey Development Board";
@@ -27,9 +25,201 @@ 
		stdout-path = "serial3:115200n8";

	};



	/*

	 * Reserve below regions from memory node:

	 *

	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using

	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data

	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section

	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE

	 */

	memory@0 {

		device_type = "memory";

		reg = <0x0 0x0 0x0 0x40000000>;

		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,

		      <0x00000000 0x05f00000 0x00000000 0x00eff000>,

		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,

		      <0x00000000 0x07410000 0x00000000 0x36bf0000>;

	};



	soc {

		spi0: spi@f7106000 {

			status = "ok";

		};



		i2c0: i2c@f7100000 {

			status = "ok";

		};



		i2c1: i2c@f7101000 {

			status = "ok";

		};



		uart1: uart@f7111000 {

			status = "ok";

		};



		uart2: uart@f7112000 {

			status = "ok";

		};



		uart3: uart@f7113000 {

			status = "ok";

		};



		dwmmc_2: dwmmc2@f723f000 {

			ti,non-removable;

			non-removable;

			/* WL_EN */

			vmmc-supply = <&wlan_en_reg>;



			#address-cells = <0x1>;

			#size-cells = <0x0>;

			wlcore: wlcore@2 {

				compatible = "ti,wl1835";

				reg = <2>;	/* sdio func num */

				/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */

				interrupt-parent = <&gpio1>;

				interrupts = <3 IRQ_TYPE_EDGE_RISING>;

			};

		};



		wlan_en_reg: regulator@1 {

			compatible = "regulator-fixed";

			regulator-name = "wlan-en-regulator";

			regulator-min-microvolt = <1800000>;

			regulator-max-microvolt = <1800000>;

			/* WLAN_EN GPIO */

			gpio = <&gpio0 5 0>;

			/* WLAN card specific delay */

			startup-delay-us = <70000>;

			enable-active-high;

		};

	};



	leds {

		compatible = "gpio-leds";

		user_led4 {

			label = "user_led4";

			gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */

			linux,default-trigger = "heartbeat";

		};



		user_led3 {

			label = "user_led3";

			gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */

			linux,default-trigger = "mmc0";

		};



		user_led2 {

			label = "user_led2";

			gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */

			linux,default-trigger = "mmc1";

		};



		user_led1 {

			label = "user_led1";

			gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */

			linux,default-trigger = "cpu0";

		};



		wlan_active_led {

			label = "wifi_active";

			gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */

			linux,default-trigger = "phy0tx";

			default-state = "off";

		};



		bt_active_led {

			label = "bt_active";

			gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */

			linux,default-trigger = "hci0rx";

			default-state = "off";

		};

	};



	pmic: pmic@f8000000 {

		compatible = "hisilicon,hi655x-pmic";

		reg = <0x0 0xf8000000 0x0 0x1000>;

		interrupt-controller;

		#interrupt-cells = <2>;

		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;



		regulators {

			ldo2: LDO2 {

				regulator-name = "LDO2_2V8";

				regulator-min-microvolt = <2500000>;

				regulator-max-microvolt = <3200000>;

				regulator-enable-ramp-delay = <120>;

			};



			ldo7: LDO7 {

				regulator-name = "LDO7_SDIO";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3300000>;

				regulator-enable-ramp-delay = <120>;

			};



			ldo10: LDO10 {

				regulator-name = "LDO10_2V85";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3000000>;

				regulator-enable-ramp-delay = <360>;

			};



			ldo13: LDO13 {

				regulator-name = "LDO13_1V8";

				regulator-min-microvolt = <1600000>;

				regulator-max-microvolt = <1950000>;

				regulator-enable-ramp-delay = <120>;

			};



			ldo14: LDO14 {

				regulator-name = "LDO14_2V8";

				regulator-min-microvolt = <2500000>;

				regulator-max-microvolt = <3200000>;

				regulator-enable-ramp-delay = <120>;

			};



			ldo15: LDO15 {

				regulator-name = "LDO15_1V8";

				regulator-min-microvolt = <1600000>;

				regulator-max-microvolt = <1950000>;

				regulator-boot-on;

				regulator-always-on;

				regulator-enable-ramp-delay = <120>;

			};



			ldo17: LDO17 {

				regulator-name = "LDO17_2V5";

				regulator-min-microvolt = <2500000>;

				regulator-max-microvolt = <3200000>;

				regulator-enable-ramp-delay = <120>;

			};



			ldo19: LDO19 {

				regulator-name = "LDO19_3V0";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3000000>;

				regulator-enable-ramp-delay = <360>;

			};



			ldo21: LDO21 {

				regulator-name = "LDO21_1V8";

				regulator-min-microvolt = <1650000>;

				regulator-max-microvolt = <2000000>;

				regulator-always-on;

				regulator-enable-ramp-delay = <120>;

			};



			ldo22: LDO22 {

				regulator-name = "LDO22_1V2";

				regulator-min-microvolt = <900000>;

				regulator-max-microvolt = <1200000>;

				regulator-boot-on;

				regulator-always-on;

				regulator-enable-ramp-delay = <120>;

			};

		};

	};

};

arch/arm64/boot/dts/hisilicon/hi6220.dtsi

+623 −0
Original line number Diff line number Diff line
@@ -6,6 +6,8 @@ 


#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/hi6220-clock.h>

#include <dt-bindings/pinctrl/hisi.h>

#include <dt-bindings/thermal/thermal.h>



/ {

	compatible = "hisilicon,hi6220";
@@ -53,11 +55,42 @@ 
			};

		};



		idle-states {

			entry-method = "psci";



			CPU_SLEEP: cpu-sleep {

				compatible = "arm,idle-state";

				local-timer-stop;

				arm,psci-suspend-param = <0x0010000>;

				entry-latency-us = <700>;

				exit-latency-us = <250>;

				min-residency-us = <1000>;

			};



			CLUSTER_SLEEP: cluster-sleep {

				compatible = "arm,idle-state";

				local-timer-stop;

				arm,psci-suspend-param = <0x1010000>;

				entry-latency-us = <1000>;

				exit-latency-us = <700>;

				min-residency-us = <2700>;

				wakeup-latency-us = <1500>;

			};

		};



		cpu0: cpu@0 {

			compatible = "arm,cortex-a53", "arm,armv8";

			device_type = "cpu";

			reg = <0x0 0x0>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			clocks = <&stub_clock 0>;

			operating-points-v2 = <&cpu_opp_table>;

			cooling-min-level = <4>;

			cooling-max-level = <0>;

			#cooling-cells = <2>; /* min followed by max */

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

			dynamic-power-coefficient = <311>;

		};



		cpu1: cpu@1 {
@@ -65,6 +98,9 @@ 
			device_type = "cpu";

			reg = <0x0 0x1>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		cpu2: cpu@2 {
@@ -72,6 +108,9 @@ 
			device_type = "cpu";

			reg = <0x0 0x2>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		cpu3: cpu@3 {
@@ -79,6 +118,9 @@ 
			device_type = "cpu";

			reg = <0x0 0x3>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER0_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		cpu4: cpu@100 {
@@ -86,6 +128,9 @@ 
			device_type = "cpu";

			reg = <0x0 0x100>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		cpu5: cpu@101 {
@@ -93,6 +138,9 @@ 
			device_type = "cpu";

			reg = <0x0 0x101>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		cpu6: cpu@102 {
@@ -100,6 +148,9 @@ 
			device_type = "cpu";

			reg = <0x0 0x102>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		cpu7: cpu@103 {
@@ -107,6 +158,48 @@ 
			device_type = "cpu";

			reg = <0x0 0x103>;

			enable-method = "psci";

			next-level-cache = <&CLUSTER1_L2>;

			operating-points-v2 = <&cpu_opp_table>;

			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;

		};



		CLUSTER0_L2: l2-cache0 {

			compatible = "cache";

		};



		CLUSTER1_L2: l2-cache1 {

			compatible = "cache";

		};

	};



	cpu_opp_table: cpu_opp_table {

		compatible = "operating-points-v2";

		opp-shared;



		opp00 {

			opp-hz = /bits/ 64 <208000000>;

			opp-microvolt = <1040000>;

			clock-latency-ns = <500000>;

		};

		opp01 {

			opp-hz = /bits/ 64 <432000000>;

			opp-microvolt = <1040000>;

			clock-latency-ns = <500000>;

		};

		opp02 {

			opp-hz = /bits/ 64 <729000000>;

			opp-microvolt = <1090000>;

			clock-latency-ns = <500000>;

		};

		opp03 {

			opp-hz = /bits/ 64 <960000000>;

			opp-microvolt = <1180000>;

			clock-latency-ns = <500000>;

		};

		opp04 {

			opp-hz = /bits/ 64 <1200000000>;

			opp-microvolt = <1330000>;

			clock-latency-ns = <500000>;

		};

	};
@@ -137,6 +230,11 @@ 
		#size-cells = <2>;

		ranges;



		sram: sram@fff80000 {

			compatible = "hisilicon,hi6220-sramctrl", "syscon";

			reg = <0x0 0xfff80000 0x0 0x12000>;

		};



		ao_ctrl: ao_ctrl@f7800000 {

			compatible = "hisilicon,hi6220-aoctrl", "syscon";

			reg = <0x0 0xf7800000 0x0 0x2000>;
@@ -162,6 +260,14 @@ 
			#clock-cells = <1>;

		};



		stub_clock: stub_clock {

			compatible = "hisilicon,hi6220-stub-clk";

			hisilicon,hi6220-clk-sram = <&sram>;

			#clock-cells = <1>;

			mbox-names = "mbox-tx";

			mboxes = <&mailbox 1 0 11>;

		};



		uart0: uart@f8015000 {	/* console */

			compatible = "arm,pl011", "arm,primecell";

			reg = <0x0 0xf8015000 0x0 0x1000>;
@@ -178,6 +284,8 @@ 
			clocks = <&sys_ctrl HI6220_UART1_PCLK>,

				 <&sys_ctrl HI6220_UART1_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func1 &uart1_cfg_func2>;

			status = "disabled";

		};
@@ -188,6 +296,8 @@ 
			clocks = <&sys_ctrl HI6220_UART2_PCLK>,

				 <&sys_ctrl HI6220_UART2_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;

			status = "disabled";

		};
@@ -198,6 +308,9 @@ 
			clocks = <&sys_ctrl HI6220_UART3_PCLK>,

				 <&sys_ctrl HI6220_UART3_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;

			status = "disabled";

		};



		uart4: uart@f7114000 {
@@ -207,7 +320,517 @@ 
			clocks = <&sys_ctrl HI6220_UART4_PCLK>,

				 <&sys_ctrl HI6220_UART4_PCLK>;

			clock-names = "uartclk", "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;

			status = "disabled";

		};



		dual_timer0: timer@f8008000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x0 0xf8008000 0x0 0x1000>;

			interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ao_ctrl HI6220_TIMER0_PCLK>,

				 <&ao_ctrl HI6220_TIMER0_PCLK>,

				 <&ao_ctrl HI6220_TIMER0_PCLK>;

			clock-names = "timer1", "timer2", "apb_pclk";

		};



		pmx0: pinmux@f7010000 {

			compatible = "pinctrl-single";

			reg = <0x0 0xf7010000  0x0 0x27c>;

			#address-cells = <1>;

			#size-cells = <1>;

			#gpio-range-cells = <3>;

			pinctrl-single,register-width = <32>;

			pinctrl-single,function-mask = <7>;

			pinctrl-single,gpio-range = <

				&range  80  8 MUX_M0 /* gpio  3: [0..7] */

				&range  88  8 MUX_M0 /* gpio  4: [0..7] */

				&range  96  8 MUX_M0 /* gpio  5: [0..7] */

				&range 104  8 MUX_M0 /* gpio  6: [0..7] */

				&range 112  8 MUX_M0 /* gpio  7: [0..7] */

				&range 120  2 MUX_M0 /* gpio  8: [0..1] */

				&range   2  6 MUX_M1 /* gpio  8: [2..7] */

				&range   8  8 MUX_M1 /* gpio  9: [0..7] */

				&range   0  1 MUX_M1 /* gpio 10: [0]    */

				&range  16  7 MUX_M1 /* gpio 10: [1..7] */

				&range  23  3 MUX_M1 /* gpio 11: [0..2] */

				&range  28  5 MUX_M1 /* gpio 11: [3..7] */

				&range  33  3 MUX_M1 /* gpio 12: [0..2] */

				&range  43  5 MUX_M1 /* gpio 12: [3..7] */

				&range  48  8 MUX_M1 /* gpio 13: [0..7] */

				&range  56  8 MUX_M1 /* gpio 14: [0..7] */

				&range  74  6 MUX_M1 /* gpio 15: [0..5] */

				&range 122  1 MUX_M1 /* gpio 15: [6]    */

				&range 126  1 MUX_M1 /* gpio 15: [7]    */

				&range 127  8 MUX_M1 /* gpio 16: [0..7] */

				&range 135  8 MUX_M1 /* gpio 17: [0..7] */

				&range 143  8 MUX_M1 /* gpio 18: [0..7] */

				&range 151  8 MUX_M1 /* gpio 19: [0..7] */

			>;

			range: gpio-range {

				#pinctrl-single,gpio-range-cells = <3>;

			};

		};



		pmx1: pinmux@f7010800 {

			compatible = "pinconf-single";

			reg = <0x0 0xf7010800 0x0 0x28c>;

			#address-cells = <1>;

			#size-cells = <1>;

			pinctrl-single,register-width = <32>;

		};



		pmx2: pinmux@f8001800 {

			compatible = "pinconf-single";

			reg = <0x0 0xf8001800 0x0 0x78>;

			#address-cells = <1>;

			#size-cells = <1>;

			pinctrl-single,register-width = <32>;

		};



		gpio0: gpio@f8011000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf8011000 0x0 0x1000>;

			interrupts = <0 52 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio1: gpio@f8012000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf8012000 0x0 0x1000>;

			interrupts = <0 53 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio2: gpio@f8013000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf8013000 0x0 0x1000>;

			interrupts = <0 54 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio3: gpio@f8014000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf8014000 0x0 0x1000>;

			interrupts = <0 55 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 80 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio4: gpio@f7020000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7020000 0x0 0x1000>;

			interrupts = <0 56 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 88 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio5: gpio@f7021000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7021000 0x0 0x1000>;

			interrupts = <0 57 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 96 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio6: gpio@f7022000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7022000 0x0 0x1000>;

			interrupts = <0 58 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 104 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio7: gpio@f7023000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7023000 0x0 0x1000>;

			interrupts = <0 59 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 112 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio8: gpio@f7024000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7024000 0x0 0x1000>;

			interrupts = <0 60 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 120 2 &pmx0 2 2 6>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio9: gpio@f7025000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7025000 0x0 0x1000>;

			interrupts = <0 61 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 8 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio10: gpio@f7026000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7026000 0x0 0x1000>;

			interrupts = <0 62 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 0 1 &pmx0 1 16 7>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio11: gpio@f7027000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7027000 0x0 0x1000>;

			interrupts = <0 63 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 23 3 &pmx0 3 28 5>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio12: gpio@f7028000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7028000 0x0 0x1000>;

			interrupts = <0 64 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 33 3 &pmx0 3 43 5>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio13: gpio@f7029000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf7029000 0x0 0x1000>;

			interrupts = <0 65 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 48 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio14: gpio@f702a000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf702a000 0x0 0x1000>;

			interrupts = <0 66 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 56 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio15: gpio@f702b000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf702b000 0x0 0x1000>;

			interrupts = <0 67 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <

				&pmx0 0 74 6

				&pmx0 6 122 1

				&pmx0 7 126 1

			>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio16: gpio@f702c000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf702c000 0x0 0x1000>;

			interrupts = <0 68 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 127 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio17: gpio@f702d000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf702d000 0x0 0x1000>;

			interrupts = <0 69 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 135 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio18: gpio@f702e000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf702e000 0x0 0x1000>;

			interrupts = <0 70 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 143 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		gpio19: gpio@f702f000 {

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x0 0xf702f000 0x0 0x1000>;

			interrupts = <0 71 0x4>;

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pmx0 0 151 8>;

			interrupt-controller;

			#interrupt-cells = <2>;

			clocks = <&ao_ctrl 2>;

			clock-names = "apb_pclk";

		};



		spi0: spi@f7106000 {

			compatible = "arm,pl022", "arm,primecell";

			reg = <0x0 0xf7106000 0x0 0x1000>;

			interrupts = <0 50 4>;

			bus-id = <0>;

			enable-dma = <0>;

			clocks = <&sys_ctrl HI6220_SPI_CLK>;

			clock-names = "apb_pclk";

			pinctrl-names = "default";

			pinctrl-0 = <&spi0_pmx_func &spi0_cfg_func>;

			num-cs = <1>;

			cs-gpios = <&gpio6 2 0>;

			status = "disabled";

		};



		i2c0: i2c@f7100000 {

			compatible = "snps,designware-i2c";

			reg = <0x0 0xf7100000 0x0 0x1000>;

			interrupts = <0 44 4>;

			clocks = <&sys_ctrl HI6220_I2C0_CLK>;

			i2c-sda-hold-time-ns = <300>;

			pinctrl-names = "default";

			pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;

			status = "disabled";

		};



		i2c1: i2c@f7101000 {

			compatible = "snps,designware-i2c";

			reg = <0x0 0xf7101000 0x0 0x1000>;

			clocks = <&sys_ctrl HI6220_I2C1_CLK>;

			interrupts = <0 45 4>;

			i2c-sda-hold-time-ns = <300>;

			pinctrl-names = "default";

			pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;

			status = "disabled";

		};



		i2c2: i2c@f7102000 {

			compatible = "snps,designware-i2c";

			reg = <0x0 0xf7102000 0x0 0x1000>;

			clocks = <&sys_ctrl HI6220_I2C2_CLK>;

			interrupts = <0 46 4>;

			i2c-sda-hold-time-ns = <300>;

			pinctrl-names = "default";

			pinctrl-0 = <&i2c2_pmx_func &i2c2_cfg_func>;

			status = "disabled";

		};



		fixed_5v_hub: regulator@0 {

			compatible = "regulator-fixed";

			regulator-name = "fixed_5v_hub";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			regulator-boot-on;

			gpio = <&gpio0 7 0>;

			regulator-always-on;

		};



		usb_phy: usbphy {

			compatible = "hisilicon,hi6220-usb-phy";

			#phy-cells = <0>;

			phy-supply = <&fixed_5v_hub>;

			hisilicon,peripheral-syscon = <&sys_ctrl>;

		};



		usb: usb@f72c0000 {

			compatible = "hisilicon,hi6220-usb";

			reg = <0x0 0xf72c0000 0x0 0x40000>;

			phys = <&usb_phy>;

			phy-names = "usb2-phy";

			clocks = <&sys_ctrl HI6220_USBOTG_HCLK>;

			clock-names = "otg";

			dr_mode = "otg";

			g-use-dma;

			g-rx-fifo-size = <512>;

			g-np-tx-fifo-size = <128>;

			g-tx-fifo-size = <128 128 128 128 128 128>;

			interrupts = <0 77 0x4>;

		};



		mailbox: mailbox@f7510000 {

			compatible = "hisilicon,hi6220-mbox";

			reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */

			      <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */

			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;

			#mbox-cells = <3>;

		};



		dwmmc_0: dwmmc0@f723d000 {

			compatible = "hisilicon,hi6220-dw-mshc";

			num-slots = <0x1>;

			cap-mmc-highspeed;

			non-removable;

			reg = <0x0 0xf723d000 0x0 0x1000>;

			interrupts = <0x0 0x48 0x4>;

			clocks = <&sys_ctrl 2>, <&sys_ctrl 1>;

			clock-names = "ciu", "biu";

			bus-width = <0x8>;

			vmmc-supply = <&ldo19>;

			pinctrl-names = "default";

			pinctrl-0 = <&emmc_pmx_func &emmc_clk_cfg_func

				     &emmc_cfg_func &emmc_rst_cfg_func>;

		};



		dwmmc_1: dwmmc1@f723e000 {

			compatible = "hisilicon,hi6220-dw-mshc";

			num-slots = <0x1>;

			card-detect-delay = <200>;

			hisilicon,peripheral-syscon = <&ao_ctrl>;

			cap-sd-highspeed;

			reg = <0x0 0xf723e000 0x0 0x1000>;

			interrupts = <0x0 0x49 0x4>;

			#address-cells = <0x1>;

			#size-cells = <0x0>;

			clocks = <&sys_ctrl 4>, <&sys_ctrl 3>;

			clock-names = "ciu", "biu";

			vqmmc-supply = <&ldo7>;

			vmmc-supply = <&ldo10>;

			bus-width = <0x4>;

			disable-wp;

			cd-gpios = <&gpio1 0 1>;

			pinctrl-names = "default", "idle";

			pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>;

			pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>;

		};



		dwmmc_2: dwmmc2@f723f000 {

			compatible = "hisilicon,hi6220-dw-mshc";

			num-slots = <0x1>;

			reg = <0x0 0xf723f000 0x0 0x1000>;

			interrupts = <0x0 0x4a 0x4>;

			clocks = <&sys_ctrl HI6220_MMC2_CIUCLK>, <&sys_ctrl HI6220_MMC2_CLK>;

			clock-names = "ciu", "biu";

			bus-width = <0x4>;

			broken-cd;

			pinctrl-names = "default", "idle";

			pinctrl-0 = <&sdio_pmx_func &sdio_clk_cfg_func &sdio_cfg_func>;

			pinctrl-1 = <&sdio_pmx_idle &sdio_clk_cfg_idle &sdio_cfg_idle>;

		};



		tsensor: tsensor@0,f7030700 {

			compatible = "hisilicon,tsensor";

			reg = <0x0 0xf7030700 0x0 0x1000>;

			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&sys_ctrl 22>;

			clock-names = "thermal_clk";

			#thermal-sensor-cells = <1>;

		};



		thermal-zones {



			cls0: cls0 {

				polling-delay = <1000>;

				polling-delay-passive = <100>;

				sustainable-power = <3326>;



				/* sensor ID */

				thermal-sensors = <&tsensor 2>;



				trips {

					threshold: trip-point@0 {

						temperature = <65000>;

						hysteresis = <0>;

						type = "passive";

					};



					target: trip-point@1 {

						temperature = <75000>;

						hysteresis = <0>;

						type = "passive";

					};

				};



				cooling-maps {

					map0 {

						trip = <&target>;

						cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

					};

				};

			};

		};

	};

};

arch/arm64/boot/dts/hisilicon/hikey-pinctrl.dtsi

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include/dt-bindings/pinctrl/hisi.h

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