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Commit 03f89feb authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: cleanup get_invalidate_req v2 



The two hubs are just instances of the same hardware,
so the register bits are identical.

v2: keep the function pointer

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 36b32a68

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −1
Original line number Diff line number Diff line
@@ -306,6 +306,7 @@ struct amdgpu_gart_funcs { 
				     uint32_t flags);

	/* adjust mc addr in fb for APU case */

	u64 (*adjust_mc_addr)(struct amdgpu_device *adev, u64 addr);

	uint32_t (*get_invalidate_req)(unsigned int vm_id);

};



/* provided by the ih block */
@@ -570,7 +571,6 @@ struct amdgpu_vmhub { 
	uint32_t	vm_context0_cntl;

	uint32_t	vm_l2_pro_fault_status;

	uint32_t	vm_l2_pro_fault_cntl;

	uint32_t	(*get_invalidate_req)(unsigned int vm_id);

};



/*

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+1 −1
Original line number Diff line number Diff line
@@ -3148,6 +3148,7 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring, 
					unsigned vm_id, uint64_t pd_addr)

{

	int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);

	uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);

	unsigned eng = ring->idx;

	unsigned i;
@@ -3157,7 +3158,6 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring, 


	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {

		struct amdgpu_vmhub *hub = &ring->adev->vmhub[i];

		uint32_t req = hub->get_invalidate_req(vm_id);



		gfx_v9_0_write_data_to_reg(ring, usepfp, true,

					   hub->ctx0_ptb_addr_lo32

drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c

+0 −21
Original line number Diff line number Diff line
@@ -299,25 +299,6 @@ void gfxhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, 
	WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL), tmp);

}



static uint32_t gfxhub_v1_0_get_invalidate_req(unsigned int vm_id)

{

	u32 req = 0;



	/* invalidate using legacy mode on vm_id*/

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vm_id);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



static int gfxhub_v1_0_early_init(void *handle)

{

	return 0;
@@ -350,8 +331,6 @@ static int gfxhub_v1_0_sw_init(void *handle) 
	hub->vm_l2_pro_fault_cntl =

		SOC15_REG_OFFSET(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL);



	hub->get_invalidate_req = gfxhub_v1_0_get_invalidate_req;



	return 0;

}

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+21 −1
Original line number Diff line number Diff line
@@ -173,6 +173,25 @@ static void gmc_v9_0_set_irq_funcs(struct amdgpu_device *adev) 
	adev->mc.vm_fault.funcs = &gmc_v9_0_irq_funcs;

}



static uint32_t gmc_v9_0_get_invalidate_req(unsigned int vm_id)

{

	u32 req = 0;



	/* invalidate using legacy mode on vm_id*/

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vm_id);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



/*

 * GART

 * VMID 0 is the physical GPU addresses as used by the kernel.
@@ -202,7 +221,7 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct amdgpu_device *adev, 


	for (i = 0; i < AMDGPU_MAX_VMHUBS; ++i) {

		struct amdgpu_vmhub *hub = &adev->vmhub[i];

		u32 tmp = hub->get_invalidate_req(vmid);

		u32 tmp = gmc_v9_0_get_invalidate_req(vmid);



		WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
@@ -345,6 +364,7 @@ static const struct amdgpu_gart_funcs gmc_v9_0_gart_funcs = { 
	.set_pte_pde = gmc_v9_0_gart_set_pte_pde,

	.get_vm_pte_flags = gmc_v9_0_get_vm_pte_flags,

	.adjust_mc_addr = gmc_v9_0_adjust_mc_addr,

	.get_invalidate_req = gmc_v9_0_get_invalidate_req,

};



static void gmc_v9_0_set_gart_funcs(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

+0 −21
Original line number Diff line number Diff line
@@ -317,25 +317,6 @@ void mmhub_v1_0_set_fault_enable_default(struct amdgpu_device *adev, bool value) 
	WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL), tmp);

}



static uint32_t mmhub_v1_0_get_invalidate_req(unsigned int vm_id)

{

	u32 req = 0;



	/* invalidate using legacy mode on vm_id*/

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,

			    PER_VMID_INVALIDATE_REQ, 1 << vm_id);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE2, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ, INVALIDATE_L1_PTES, 1);

	req = REG_SET_FIELD(req, VM_INVALIDATE_ENG0_REQ,

			    CLEAR_PROTECTION_FAULT_STATUS_ADDR,	0);



	return req;

}



static int mmhub_v1_0_early_init(void *handle)

{

	return 0;
@@ -368,8 +349,6 @@ static int mmhub_v1_0_sw_init(void *handle) 
	hub->vm_l2_pro_fault_cntl =

		SOC15_REG_OFFSET(MMHUB, 0, mmVM_L2_PROTECTION_FAULT_CNTL);



	hub->get_invalidate_req = mmhub_v1_0_get_invalidate_req;



	return 0;

}