Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 03de3727 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

ARM: omap2: fix am43xx build without L2X0 



When CONFIG_CACHE_L2X0 is disabled, the am43xx specific suspend
implemnentation fails to link:

arch/arm/mach-omap2/sleep43xx.o: In function `get_l2cache_base':
(.text+0x180): undefined reference to `omap4_get_l2cache_base'

This adds an #ifdef protection around the code, like we do for am44xx.

Fixes: 41d37e61 ("ARM: OMAP2+: Introduce low-level suspend code for AM43XX")
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 84985460

arch/arm/mach-omap2/sleep43xx.S

+6 −2
Original line number Original line Diff line number Diff line
@@ -52,10 +52,12 @@ 
ENTRY(am43xx_do_wfi)

ENTRY(am43xx_do_wfi)

	stmfd	sp!, {r4 - r11, lr}	@ save registers on stack

	stmfd	sp!, {r4 - r11, lr}	@ save registers on stack





#ifdef CONFIG_CACHE_L2X0

	/* Retrieve l2 cache virt address BEFORE we shut off EMIF */

	/* Retrieve l2 cache virt address BEFORE we shut off EMIF */

	ldr	r1, get_l2cache_base

	ldr	r1, get_l2cache_base

	blx	r1

	blx	r1

	mov	r8, r0

	mov	r8, r0

#endif





	/*

	/*

	 * Flush all data from the L1 and L2 data cache before disabling

	 * Flush all data from the L1 and L2 data cache before disabling
@@ -334,8 +336,6 @@ ENDPROC(am43xx_resume_from_deep_sleep) 
	.align

	.align

resume_addr:

resume_addr:

	.word	cpu_resume - PAGE_OFFSET + 0x80000000

	.word	cpu_resume - PAGE_OFFSET + 0x80000000

get_l2cache_base:

	.word	omap4_get_l2cache_base

kernel_flush:

kernel_flush:

	.word   v7_flush_dcache_all

	.word   v7_flush_dcache_all

ddr_start:

ddr_start:
@@ -354,7 +354,10 @@ am43xx_phys_emif_clkctrl: 
	.word	(AM43XX_CM_BASE + AM43XX_CM_PER_INST + \

	.word	(AM43XX_CM_BASE + AM43XX_CM_PER_INST + \

		 AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET)

		 AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET)





#ifdef CONFIG_CACHE_L2X0

/* L2 cache related defines for AM437x */

/* L2 cache related defines for AM437x */

get_l2cache_base:

	.word	omap4_get_l2cache_base

l2_cache_base:

l2_cache_base:

	.word	OMAP44XX_L2CACHE_BASE

	.word	OMAP44XX_L2CACHE_BASE

l2_smc1:

l2_smc1:
@@ -365,6 +368,7 @@ l2_smc3: 
	.word	OMAP4_MON_L2X0_CTRL_INDEX

	.word	OMAP4_MON_L2X0_CTRL_INDEX

l2_val:

l2_val:

	.word	0xffff

	.word	0xffff

#endif





.align 3

.align 3

/* DDR related defines */

/* DDR related defines */