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Commit 03c7f70b authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'qed-roce-iscsi' 



Yuval Mintz says:

====================
qed: RocE & iSCSI infrastructure

We plan on sending 2 new protocol drivers in the imminent future -
both our RoCE [qedr] and iSCSI [qedi] drivers. As both submissions
would be rather massive and in order to avoid collisions between them,
the common infrastructure on the qed side was prepared as an independent
patch-series to be sent ahead of those 2 submissions.

This patch series introduces in QED 2 new 'ids' - one for iscsi and
one for roce. It then goes and adds logic required for configuring
said protocols in HW. Notice it *doesn't* actually add any client using
said ids, but rather only the infrastructure to allow their later usage.

What this patch doesn't contain is the slowpath protocol-configuration
toward the firmware. I.e., it contains register-setting logic, memory
allocations, etc., but not actual flow-related configuration specific
to the protocl. Those would be sent as part of the protocol driver
submissions.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 330348d9 dbb799c3

drivers/net/ethernet/qlogic/qed/qed.h

+13 −0
Original line number Diff line number Diff line
@@ -127,6 +127,8 @@ struct qed_tunn_update_params { 
 */

enum qed_pci_personality {

	QED_PCI_ETH,

	QED_PCI_ISCSI,

	QED_PCI_ETH_ROCE,

	QED_PCI_DEFAULT /* default in shmem */

};
@@ -170,6 +172,8 @@ enum QED_PORT_MODE { 


enum qed_dev_cap {

	QED_DEV_CAP_ETH,

	QED_DEV_CAP_ISCSI,

	QED_DEV_CAP_ROCE,

};



struct qed_hw_info {
@@ -183,6 +187,8 @@ struct qed_hw_info { 


#define RESC_START(_p_hwfn, resc) ((_p_hwfn)->hw_info.resc_start[resc])

#define RESC_NUM(_p_hwfn, resc) ((_p_hwfn)->hw_info.resc_num[resc])

#define RESC_END(_p_hwfn, resc) (RESC_START(_p_hwfn, resc) + \

				 RESC_NUM(_p_hwfn, resc))

#define FEAT_NUM(_p_hwfn, resc) ((_p_hwfn)->hw_info.feat_num[resc])



	u8				num_tc;
@@ -255,6 +261,7 @@ struct qed_qm_info { 
	u8				pure_lb_pq;

	u8				offload_pq;

	u8				pure_ack_pq;

	u8 ooo_pq;

	u8				vf_queues_offset;

	u16				num_pqs;

	u16				num_vf_pqs;
@@ -267,6 +274,7 @@ struct qed_qm_info { 
	u8				pf_wfq;

	u32				pf_rl;

	struct qed_wfq_data		*wfq_data;

	u8 num_pf_rls;

};



struct storm_stats {
@@ -312,6 +320,7 @@ struct qed_hwfn { 
	bool				hw_init_done;



	u8				num_funcs_on_engine;

	u8 enabled_func_idx;



	/* BAR access */

	void __iomem			*regview;
@@ -350,6 +359,9 @@ struct qed_hwfn { 
	/* Protocol related */

	struct qed_pf_params		pf_params;



	bool b_rdma_enabled_in_prs;

	u32 rdma_prs_search_reg;



	/* Array of sb_info of all status blocks */

	struct qed_sb_info		*sbs_info[MAX_SB_PER_PF_MIMD];

	u16				num_sbs;
@@ -555,6 +567,7 @@ static inline u8 qed_concrete_to_sw_fid(struct qed_dev *cdev, 
}



#define PURE_LB_TC 8

#define OOO_LB_TC 9



int qed_configure_vport_wfq(struct qed_dev *cdev, u16 vp_id, u32 rate);

void qed_configure_vp_wfq_on_link_change(struct qed_dev *cdev, u32 min_pf_rate);