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Commit 03736f4c authored by Mikita Lipski's avatar Mikita Lipski Committed by Alex Deucher
Browse files

drm/amd/display: Prevent master programming in multisync 



Verify that the stream is master - and program only the slave displays

Signed-off-by: default avatarMikita Lipski <mikita.lipski@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3bc4aaa9

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+1 −1
Original line number Diff line number Diff line
@@ -2348,7 +2348,7 @@ static void set_master_stream(struct dc_stream_state *stream_set[], 
		}

	}

	for (j = 0;  j < stream_count; j++) {

		if (stream_set[j] && j != master_stream)

		if (stream_set[j])

			stream_set[j]->triggered_crtc_reset.event_source = stream_set[master_stream];

	}

}

drivers/gpu/drm/amd/display/dc/core/dc.c

+3 −1
Original line number Diff line number Diff line
@@ -521,11 +521,13 @@ static void enable_timing_multisync( 
		if (!ctx->res_ctx.pipe_ctx[i].stream ||

				!ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.enabled)

			continue;

		if (ctx->res_ctx.pipe_ctx[i].stream == ctx->res_ctx.pipe_ctx[i].stream->triggered_crtc_reset.event_source)

			continue;

		multisync_pipes[multisync_count] = &ctx->res_ctx.pipe_ctx[i];

		multisync_count++;

	}



	if (multisync_count > 1) {

	if (multisync_count > 0) {

		dc->hwss.enable_per_frame_crtc_position_reset(

			dc, multisync_count, multisync_pipes);

	}

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c

+1 −1
Original line number Diff line number Diff line
@@ -1097,7 +1097,7 @@ static void dcn10_enable_per_frame_crtc_position_reset( 


	DC_SYNC_INFO("Waiting for trigger\n");



	for (i = 1; i < group_size; i++)

	for (i = 0; i < group_size; i++)

		wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg);



	DC_SYNC_INFO("Multi-display sync is complete\n");