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Commit 01d300c5 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'amd-xgbe-next' 



Tom Lendacky says:

====================
amd-xgbe: AMD XGBE driver updates 2017-08-17

The following updates are included in this driver update series:

- Set the MDIO mode to clause 45 for the 10GBase-T configuration
- Set the MII control width to 8-bits for speeds less than 1Gbps
- Fix an issue to related to module removal when the devices are up
- Fix ethtool statistics related to packet counting of TSO packets
- Add support for device renaming
- Add additional dynamic debug output for the PCS window calculation
- Optimize reading of DMA channel interrupt enablement register
- Add additional dynamic debug output about the hardware features
- Add per queue Tx and Rx ethtool statistics
- Add a macro to clear ethtool_link_ksettings modes
- Convert the driver to use the ethtool_link_ksettings
- Add support for VXLAN offload capabilities
- Add additional ethtool statistics related to VXLAN

This patch series is based on net-next.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 1547f538 3010608d

drivers/net/ethernet/amd/xgbe/xgbe-common.h

+25 −0
Original line number Diff line number Diff line
@@ -298,6 +298,7 @@ 
#define MAC_RWKPFR			0x00c4

#define MAC_LPICSR			0x00d0

#define MAC_LPITCR			0x00d4

#define MAC_TIR				0x00e0

#define MAC_VR				0x0110

#define MAC_DR				0x0114

#define MAC_HWF0R			0x011c
@@ -364,6 +365,8 @@ 
#define MAC_HWF0R_TXCOESEL_WIDTH	1

#define MAC_HWF0R_VLHASH_INDEX		4

#define MAC_HWF0R_VLHASH_WIDTH		1

#define MAC_HWF0R_VXN_INDEX		29

#define MAC_HWF0R_VXN_WIDTH		1

#define MAC_HWF1R_ADDR64_INDEX		14

#define MAC_HWF1R_ADDR64_WIDTH		2

#define MAC_HWF1R_ADVTHWORD_INDEX	13
@@ -448,6 +451,8 @@ 
#define MAC_PFR_PR_WIDTH		1

#define MAC_PFR_VTFE_INDEX		16

#define MAC_PFR_VTFE_WIDTH		1

#define MAC_PFR_VUCC_INDEX		22

#define MAC_PFR_VUCC_WIDTH		1

#define MAC_PMTCSR_MGKPKTEN_INDEX	1

#define MAC_PMTCSR_MGKPKTEN_WIDTH	1

#define MAC_PMTCSR_PWRDWN_INDEX		0
@@ -510,6 +515,12 @@ 
#define MAC_TCR_SS_WIDTH		2

#define MAC_TCR_TE_INDEX		0

#define MAC_TCR_TE_WIDTH		1

#define MAC_TCR_VNE_INDEX		24

#define MAC_TCR_VNE_WIDTH		1

#define MAC_TCR_VNM_INDEX		25

#define MAC_TCR_VNM_WIDTH		1

#define MAC_TIR_TNID_INDEX		0

#define MAC_TIR_TNID_WIDTH		16

#define MAC_TSCR_AV8021ASMEN_INDEX	28

#define MAC_TSCR_AV8021ASMEN_WIDTH	1

#define MAC_TSCR_SNAPTYPSEL_INDEX	16
@@ -1153,11 +1164,17 @@ 
#define RX_PACKET_ATTRIBUTES_RSS_HASH_WIDTH	1

#define RX_PACKET_ATTRIBUTES_FIRST_INDEX	7

#define RX_PACKET_ATTRIBUTES_FIRST_WIDTH	1

#define RX_PACKET_ATTRIBUTES_TNP_INDEX		8

#define RX_PACKET_ATTRIBUTES_TNP_WIDTH		1

#define RX_PACKET_ATTRIBUTES_TNPCSUM_DONE_INDEX	9

#define RX_PACKET_ATTRIBUTES_TNPCSUM_DONE_WIDTH	1



#define RX_NORMAL_DESC0_OVT_INDEX		0

#define RX_NORMAL_DESC0_OVT_WIDTH		16

#define RX_NORMAL_DESC2_HL_INDEX		0

#define RX_NORMAL_DESC2_HL_WIDTH		10

#define RX_NORMAL_DESC2_TNP_INDEX		11

#define RX_NORMAL_DESC2_TNP_WIDTH		1

#define RX_NORMAL_DESC3_CDA_INDEX		27

#define RX_NORMAL_DESC3_CDA_WIDTH		1

#define RX_NORMAL_DESC3_CTXT_INDEX		30
@@ -1184,9 +1201,11 @@ 
#define RX_DESC3_L34T_IPV4_TCP			1

#define RX_DESC3_L34T_IPV4_UDP			2

#define RX_DESC3_L34T_IPV4_ICMP			3

#define RX_DESC3_L34T_IPV4_UNKNOWN		7

#define RX_DESC3_L34T_IPV6_TCP			9

#define RX_DESC3_L34T_IPV6_UDP			10

#define RX_DESC3_L34T_IPV6_ICMP			11

#define RX_DESC3_L34T_IPV6_UNKNOWN		15



#define RX_CONTEXT_DESC3_TSA_INDEX		4

#define RX_CONTEXT_DESC3_TSA_WIDTH		1
@@ -1201,6 +1220,8 @@ 
#define TX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH	1

#define TX_PACKET_ATTRIBUTES_PTP_INDEX		3

#define TX_PACKET_ATTRIBUTES_PTP_WIDTH		1

#define TX_PACKET_ATTRIBUTES_VXLAN_INDEX	4

#define TX_PACKET_ATTRIBUTES_VXLAN_WIDTH	1



#define TX_CONTEXT_DESC2_MSS_INDEX		0

#define TX_CONTEXT_DESC2_MSS_WIDTH		15
@@ -1241,8 +1262,11 @@ 
#define TX_NORMAL_DESC3_TCPPL_WIDTH		18

#define TX_NORMAL_DESC3_TSE_INDEX		18

#define TX_NORMAL_DESC3_TSE_WIDTH		1

#define TX_NORMAL_DESC3_VNP_INDEX		23

#define TX_NORMAL_DESC3_VNP_WIDTH		3



#define TX_NORMAL_DESC2_VLAN_INSERT		0x2

#define TX_NORMAL_DESC3_VXLAN_PACKET		0x3



/* MDIO undefined or vendor specific registers */

#ifndef MDIO_PMA_10GBR_PMD_CTRL
@@ -1339,6 +1363,7 @@ 
#define XGBE_AN_CL37_PCS_MODE_BASEX	0x00

#define XGBE_AN_CL37_PCS_MODE_SGMII	0x04

#define XGBE_AN_CL37_TX_CONFIG_MASK	0x08

#define XGBE_AN_CL37_MII_CTRL_8BIT	0x0100



/* Bit setting and getting macros

 *  The get macro will extract the current bit field value from within

drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c

+25 −0
Original line number Diff line number Diff line
@@ -527,3 +527,28 @@ void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) 
	debugfs_remove_recursive(pdata->xgbe_debugfs);

	pdata->xgbe_debugfs = NULL;

}



void xgbe_debugfs_rename(struct xgbe_prv_data *pdata)

{

	struct dentry *pfile;

	char *buf;



	if (!pdata->xgbe_debugfs)

		return;



	buf = kasprintf(GFP_KERNEL, "amd-xgbe-%s", pdata->netdev->name);

	if (!buf)

		return;



	if (!strcmp(pdata->xgbe_debugfs->d_name.name, buf))

		goto out;



	pfile = debugfs_rename(pdata->xgbe_debugfs->d_parent,

			       pdata->xgbe_debugfs,

			       pdata->xgbe_debugfs->d_parent, buf);

	if (!pfile)

		netdev_err(pdata->netdev, "debugfs_rename failed\n");



out:

	kfree(buf);

}

drivers/net/ethernet/amd/xgbe/xgbe-dev.c

+145 −53
Original line number Diff line number Diff line
@@ -479,6 +479,50 @@ static bool xgbe_is_pfc_queue(struct xgbe_prv_data *pdata, 
	return false;

}



static void xgbe_set_vxlan_id(struct xgbe_prv_data *pdata)

{

	/* Program the VXLAN port */

	XGMAC_IOWRITE_BITS(pdata, MAC_TIR, TNID, pdata->vxlan_port);



	netif_dbg(pdata, drv, pdata->netdev, "VXLAN tunnel id set to %hx\n",

		  pdata->vxlan_port);

}



static void xgbe_enable_vxlan(struct xgbe_prv_data *pdata)

{

	if (!pdata->hw_feat.vxn)

		return;



	/* Program the VXLAN port */

	xgbe_set_vxlan_id(pdata);



	/* Allow for IPv6/UDP zero-checksum VXLAN packets */

	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VUCC, 1);



	/* Enable VXLAN tunneling mode */

	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, VNM, 0);

	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, VNE, 1);



	netif_dbg(pdata, drv, pdata->netdev, "VXLAN acceleration enabled\n");

}



static void xgbe_disable_vxlan(struct xgbe_prv_data *pdata)

{

	if (!pdata->hw_feat.vxn)

		return;



	/* Disable tunneling mode */

	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, VNE, 0);



	/* Clear IPv6/UDP zero-checksum VXLAN packets setting */

	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VUCC, 0);



	/* Clear the VXLAN port */

	XGMAC_IOWRITE_BITS(pdata, MAC_TIR, TNID, 0);



	netif_dbg(pdata, drv, pdata->netdev, "VXLAN acceleration disabled\n");

}



static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata)

{

	unsigned int max_q_count, q_count;
@@ -605,7 +649,6 @@ static void xgbe_config_flow_control(struct xgbe_prv_data *pdata) 
static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata)

{

	struct xgbe_channel *channel;

	unsigned int dma_ch_isr, dma_ch_ier;

	unsigned int i;



	/* Set the interrupt mode if supported */
@@ -617,20 +660,20 @@ static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata) 
		channel = pdata->channel[i];



		/* Clear all the interrupts which are set */

		dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);

		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);

		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR,

				  XGMAC_DMA_IOREAD(channel, DMA_CH_SR));



		/* Clear all interrupt enable bits */

		dma_ch_ier = 0;

		channel->curr_ier = 0;



		/* Enable following interrupts

		 *   NIE  - Normal Interrupt Summary Enable

		 *   AIE  - Abnormal Interrupt Summary Enable

		 *   FBEE - Fatal Bus Error Enable

		 */

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, NIE, 1);

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, AIE, 1);

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1);



		if (channel->tx_ring) {

			/* Enable the following Tx interrupts
@@ -639,7 +682,8 @@ static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata) 
			 *          mode)

			 */

			if (!pdata->per_channel_irq || pdata->channel_irq_mode)

				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);

				XGMAC_SET_BITS(channel->curr_ier,

					       DMA_CH_IER, TIE, 1);

		}

		if (channel->rx_ring) {

			/* Enable following Rx interrupts
@@ -648,12 +692,13 @@ static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata) 
			 *          per channel interrupts in edge triggered

			 *          mode)

			 */

			XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);

			XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 1);

			if (!pdata->per_channel_irq || pdata->channel_irq_mode)

				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);

				XGMAC_SET_BITS(channel->curr_ier,

					       DMA_CH_IER, RIE, 1);

		}



		XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);

		XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier);

	}

}
@@ -1608,7 +1653,8 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel) 
	struct xgbe_ring_data *rdata;

	struct xgbe_ring_desc *rdesc;

	struct xgbe_packet_data *packet = &ring->packet_data;

	unsigned int csum, tso, vlan;

	unsigned int tx_packets, tx_bytes;

	unsigned int csum, tso, vlan, vxlan;

	unsigned int tso_context, vlan_context;

	unsigned int tx_set_ic;

	int start_index = ring->cur;
@@ -1617,12 +1663,17 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel) 


	DBGPR("-->xgbe_dev_xmit\n");



	tx_packets = packet->tx_packets;

	tx_bytes = packet->tx_bytes;



	csum = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,

			      CSUM_ENABLE);

	tso = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,

			     TSO_ENABLE);

	vlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,

			      VLAN_CTAG);

	vxlan = XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,

			       VXLAN);



	if (tso && (packet->mss != ring->tx.cur_mss))

		tso_context = 1;
@@ -1644,13 +1695,12 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel) 
	 *     - Addition of Tx frame count to the frame count since the

	 *       last interrupt was set does not exceed the frame count setting

	 */

	ring->coalesce_count += packet->tx_packets;

	ring->coalesce_count += tx_packets;

	if (!pdata->tx_frames)

		tx_set_ic = 0;

	else if (packet->tx_packets > pdata->tx_frames)

	else if (tx_packets > pdata->tx_frames)

		tx_set_ic = 1;

	else if ((ring->coalesce_count % pdata->tx_frames) <

		 packet->tx_packets)

	else if ((ring->coalesce_count % pdata->tx_frames) < tx_packets)

		tx_set_ic = 1;

	else

		tx_set_ic = 0;
@@ -1740,7 +1790,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel) 
		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, TCPHDRLEN,

				  packet->tcp_header_len / 4);



		pdata->ext_stats.tx_tso_packets++;

		pdata->ext_stats.tx_tso_packets += tx_packets;

	} else {

		/* Enable CRC and Pad Insertion */

		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, CPC, 0);
@@ -1755,6 +1805,13 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel) 
				  packet->length);

	}



	if (vxlan) {

		XGMAC_SET_BITS_LE(rdesc->desc3, TX_NORMAL_DESC3, VNP,

				  TX_NORMAL_DESC3_VXLAN_PACKET);



		pdata->ext_stats.tx_vxlan_packets += packet->tx_packets;

	}



	for (i = cur_index - start_index + 1; i < packet->rdesc_count; i++) {

		cur_index++;

		rdata = XGBE_GET_DESC_DATA(ring, cur_index);
@@ -1788,8 +1845,11 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel) 
		XGMAC_SET_BITS_LE(rdesc->desc2, TX_NORMAL_DESC2, IC, 1);



	/* Save the Tx info to report back during cleanup */

	rdata->tx.packets = packet->tx_packets;

	rdata->tx.bytes = packet->tx_bytes;

	rdata->tx.packets = tx_packets;

	rdata->tx.bytes = tx_bytes;



	pdata->ext_stats.txq_packets[channel->queue_index] += tx_packets;

	pdata->ext_stats.txq_bytes[channel->queue_index] += tx_bytes;



	/* In case the Tx DMA engine is running, make sure everything

	 * is written to the descriptor(s) before setting the OWN bit
@@ -1913,9 +1973,28 @@ static int xgbe_dev_read(struct xgbe_channel *channel) 
	rdata->rx.len = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, PL);



	/* Set checksum done indicator as appropriate */

	if (netdev->features & NETIF_F_RXCSUM)

	if (netdev->features & NETIF_F_RXCSUM) {

		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

			       CSUM_DONE, 1);

		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

			       TNPCSUM_DONE, 1);

	}



	/* Set the tunneled packet indicator */

	if (XGMAC_GET_BITS_LE(rdesc->desc2, RX_NORMAL_DESC2, TNP)) {

		XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

			       TNP, 1);

		pdata->ext_stats.rx_vxlan_packets++;



		l34t = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, L34T);

		switch (l34t) {

		case RX_DESC3_L34T_IPV4_UNKNOWN:

		case RX_DESC3_L34T_IPV6_UNKNOWN:

			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

				       TNPCSUM_DONE, 0);

			break;

		}

	}



	/* Check for errors (only valid in last descriptor) */

	err = XGMAC_GET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, ES);
@@ -1935,13 +2014,29 @@ static int xgbe_dev_read(struct xgbe_channel *channel) 
				  packet->vlan_ctag);

		}

	} else {

		if ((etlt == 0x05) || (etlt == 0x06))

		unsigned int tnp = XGMAC_GET_BITS(packet->attributes,

						  RX_PACKET_ATTRIBUTES, TNP);



		if ((etlt == 0x05) || (etlt == 0x06)) {

			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

				       CSUM_DONE, 0);

		else

			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

				       TNPCSUM_DONE, 0);

			pdata->ext_stats.rx_csum_errors++;

		} else if (tnp && ((etlt == 0x09) || (etlt == 0x0a))) {

			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

				       CSUM_DONE, 0);

			XGMAC_SET_BITS(packet->attributes, RX_PACKET_ATTRIBUTES,

				       TNPCSUM_DONE, 0);

			pdata->ext_stats.rx_vxlan_csum_errors++;

		} else {

			XGMAC_SET_BITS(packet->errors, RX_PACKET_ERRORS,

				       FRAME, 1);

		}

	}



	pdata->ext_stats.rxq_packets[channel->queue_index]++;

	pdata->ext_stats.rxq_bytes[channel->queue_index] += rdata->rx.len;



	DBGPR("<--xgbe_dev_read: %s - descriptor=%u (cur=%d)\n", channel->name,

	      ring->cur & (ring->rdesc_count - 1), ring->cur);
@@ -1964,44 +2059,40 @@ static int xgbe_is_last_desc(struct xgbe_ring_desc *rdesc) 
static int xgbe_enable_int(struct xgbe_channel *channel,

			   enum xgbe_int int_id)

{

	unsigned int dma_ch_ier;



	dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER);



	switch (int_id) {

	case XGMAC_INT_DMA_CH_SR_TI:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_TPS:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TXSE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_TBU:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TBUE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_RI:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_RBU:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_RPS:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RSE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_TI_RI:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 1);

		break;

	case XGMAC_INT_DMA_CH_SR_FBE:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1);

		break;

	case XGMAC_INT_DMA_ALL:

		dma_ch_ier |= channel->saved_ier;

		channel->curr_ier |= channel->saved_ier;

		break;

	default:

		return -1;

	}



	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);

	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier);



	return 0;

}
@@ -2009,45 +2100,41 @@ static int xgbe_enable_int(struct xgbe_channel *channel, 
static int xgbe_disable_int(struct xgbe_channel *channel,

			    enum xgbe_int int_id)

{

	unsigned int dma_ch_ier;



	dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER);



	switch (int_id) {

	case XGMAC_INT_DMA_CH_SR_TI:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_TPS:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TXSE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_TBU:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TBUE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_RI:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_RBU:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RBUE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_RPS:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RSE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_TI_RI:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, TIE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, RIE, 0);

		break;

	case XGMAC_INT_DMA_CH_SR_FBE:

		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 0);

		XGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 0);

		break;

	case XGMAC_INT_DMA_ALL:

		channel->saved_ier = dma_ch_ier & XGBE_DMA_INTERRUPT_MASK;

		dma_ch_ier &= ~XGBE_DMA_INTERRUPT_MASK;

		channel->saved_ier = channel->curr_ier;

		channel->curr_ier = 0;

		break;

	default:

		return -1;

	}



	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);

	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier);



	return 0;

}
@@ -3534,5 +3621,10 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if) 
	hw_if->disable_ecc_ded = xgbe_disable_ecc_ded;

	hw_if->disable_ecc_sec = xgbe_disable_ecc_sec;



	/* For VXLAN */

	hw_if->enable_vxlan = xgbe_enable_vxlan;

	hw_if->disable_vxlan = xgbe_disable_vxlan;

	hw_if->set_vxlan_id = xgbe_set_vxlan_id;



	DBGPR("<--xgbe_init_function_ptrs\n");

}

drivers/net/ethernet/amd/xgbe/xgbe-drv.c

+479 −8

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c

+61 −25
Original line number Diff line number Diff line
@@ -146,6 +146,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = { 
	XGMAC_MMC_STAT("tx_broadcast_packets", txbroadcastframes_gb),

	XGMAC_MMC_STAT("tx_multicast_packets", txmulticastframes_gb),

	XGMAC_MMC_STAT("tx_vlan_packets", txvlanframes_g),

	XGMAC_EXT_STAT("tx_vxlan_packets", tx_vxlan_packets),

	XGMAC_EXT_STAT("tx_tso_packets", tx_tso_packets),

	XGMAC_MMC_STAT("tx_64_byte_packets", tx64octets_gb),

	XGMAC_MMC_STAT("tx_65_to_127_byte_packets", tx65to127octets_gb),
@@ -162,6 +163,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = { 
	XGMAC_MMC_STAT("rx_broadcast_packets", rxbroadcastframes_g),

	XGMAC_MMC_STAT("rx_multicast_packets", rxmulticastframes_g),

	XGMAC_MMC_STAT("rx_vlan_packets", rxvlanframes_gb),

	XGMAC_EXT_STAT("rx_vxlan_packets", rx_vxlan_packets),

	XGMAC_MMC_STAT("rx_64_byte_packets", rx64octets_gb),

	XGMAC_MMC_STAT("rx_65_to_127_byte_packets", rx65to127octets_gb),

	XGMAC_MMC_STAT("rx_128_to_255_byte_packets", rx128to255octets_gb),
@@ -177,6 +179,8 @@ static const struct xgbe_stats xgbe_gstring_stats[] = { 
	XGMAC_MMC_STAT("rx_out_of_range_errors", rxoutofrangetype),

	XGMAC_MMC_STAT("rx_fifo_overflow_errors", rxfifooverflow),

	XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror),

	XGMAC_EXT_STAT("rx_csum_errors", rx_csum_errors),

	XGMAC_EXT_STAT("rx_vxlan_csum_errors", rx_vxlan_csum_errors),

	XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes),

	XGMAC_EXT_STAT("rx_split_header_packets", rx_split_header_packets),

	XGMAC_EXT_STAT("rx_buffer_unavailable", rx_buffer_unavailable),
@@ -186,6 +190,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = { 


static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)

{

	struct xgbe_prv_data *pdata = netdev_priv(netdev);

	int i;



	switch (stringset) {
@@ -195,6 +200,18 @@ static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data) 
			       ETH_GSTRING_LEN);

			data += ETH_GSTRING_LEN;

		}

		for (i = 0; i < pdata->tx_ring_count; i++) {

			sprintf(data, "txq_%u_packets", i);

			data += ETH_GSTRING_LEN;

			sprintf(data, "txq_%u_bytes", i);

			data += ETH_GSTRING_LEN;

		}

		for (i = 0; i < pdata->rx_ring_count; i++) {

			sprintf(data, "rxq_%u_packets", i);

			data += ETH_GSTRING_LEN;

			sprintf(data, "rxq_%u_bytes", i);

			data += ETH_GSTRING_LEN;

		}

		break;

	}

}
@@ -211,15 +228,26 @@ static void xgbe_get_ethtool_stats(struct net_device *netdev, 
		stat = (u8 *)pdata + xgbe_gstring_stats[i].stat_offset;

		*data++ = *(u64 *)stat;

	}

	for (i = 0; i < pdata->tx_ring_count; i++) {

		*data++ = pdata->ext_stats.txq_packets[i];

		*data++ = pdata->ext_stats.txq_bytes[i];

	}

	for (i = 0; i < pdata->rx_ring_count; i++) {

		*data++ = pdata->ext_stats.rxq_packets[i];

		*data++ = pdata->ext_stats.rxq_bytes[i];

	}

}



static int xgbe_get_sset_count(struct net_device *netdev, int stringset)

{

	struct xgbe_prv_data *pdata = netdev_priv(netdev);

	int ret;



	switch (stringset) {

	case ETH_SS_STATS:

		ret = XGBE_STATS_COUNT;

		ret = XGBE_STATS_COUNT +

		      (pdata->tx_ring_count * 2) +

		      (pdata->rx_ring_count * 2);

		break;



	default:
@@ -243,6 +271,7 @@ static int xgbe_set_pauseparam(struct net_device *netdev, 
			       struct ethtool_pauseparam *pause)

{

	struct xgbe_prv_data *pdata = netdev_priv(netdev);

	struct ethtool_link_ksettings *lks = &pdata->phy.lks;

	int ret = 0;



	if (pause->autoneg && (pdata->phy.autoneg != AUTONEG_ENABLE)) {
@@ -255,16 +284,21 @@ static int xgbe_set_pauseparam(struct net_device *netdev, 
	pdata->phy.tx_pause = pause->tx_pause;

	pdata->phy.rx_pause = pause->rx_pause;



	pdata->phy.advertising &= ~ADVERTISED_Pause;

	pdata->phy.advertising &= ~ADVERTISED_Asym_Pause;

	XGBE_CLR_ADV(lks, Pause);

	XGBE_CLR_ADV(lks, Asym_Pause);



	if (pause->rx_pause) {

		pdata->phy.advertising |= ADVERTISED_Pause;

		pdata->phy.advertising |= ADVERTISED_Asym_Pause;

		XGBE_SET_ADV(lks, Pause);

		XGBE_SET_ADV(lks, Asym_Pause);

	}



	if (pause->tx_pause)

		pdata->phy.advertising ^= ADVERTISED_Asym_Pause;

	if (pause->tx_pause) {

		/* Equivalent to XOR of Asym_Pause */

		if (XGBE_ADV(lks, Asym_Pause))

			XGBE_CLR_ADV(lks, Asym_Pause);

		else

			XGBE_SET_ADV(lks, Asym_Pause);

	}



	if (netif_running(netdev))

		ret = pdata->phy_if.phy_config_aneg(pdata);
@@ -276,22 +310,20 @@ static int xgbe_get_link_ksettings(struct net_device *netdev, 
				   struct ethtool_link_ksettings *cmd)

{

	struct xgbe_prv_data *pdata = netdev_priv(netdev);

	struct ethtool_link_ksettings *lks = &pdata->phy.lks;



	cmd->base.phy_address = pdata->phy.address;



	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,

						pdata->phy.supported);

	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,

						pdata->phy.advertising);

	ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,

						pdata->phy.lp_advertising);



	cmd->base.autoneg = pdata->phy.autoneg;

	cmd->base.speed = pdata->phy.speed;

	cmd->base.duplex = pdata->phy.duplex;



	cmd->base.port = PORT_NONE;



	XGBE_LM_COPY(cmd, supported, lks, supported);

	XGBE_LM_COPY(cmd, advertising, lks, advertising);

	XGBE_LM_COPY(cmd, lp_advertising, lks, lp_advertising);



	return 0;

}
@@ -299,7 +331,8 @@ static int xgbe_set_link_ksettings(struct net_device *netdev, 
				   const struct ethtool_link_ksettings *cmd)

{

	struct xgbe_prv_data *pdata = netdev_priv(netdev);

	u32 advertising;

	struct ethtool_link_ksettings *lks = &pdata->phy.lks;

	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);

	u32 speed;

	int ret;
@@ -331,15 +364,17 @@ static int xgbe_set_link_ksettings(struct net_device *netdev, 
		}

	}



	ethtool_convert_link_mode_to_legacy_u32(&advertising,

						cmd->link_modes.advertising);



	netif_dbg(pdata, link, netdev,

		  "requested advertisement %#x, phy supported %#x\n",

		  advertising, pdata->phy.supported);

		  "requested advertisement 0x%*pb, phy supported 0x%*pb\n",

		  __ETHTOOL_LINK_MODE_MASK_NBITS, cmd->link_modes.advertising,

		  __ETHTOOL_LINK_MODE_MASK_NBITS, lks->link_modes.supported);



	bitmap_and(advertising,

		   cmd->link_modes.advertising, lks->link_modes.supported,

		   __ETHTOOL_LINK_MODE_MASK_NBITS);



	advertising &= pdata->phy.supported;

	if ((cmd->base.autoneg == AUTONEG_ENABLE) && !advertising) {

	if ((cmd->base.autoneg == AUTONEG_ENABLE) &&

	    bitmap_empty(advertising, __ETHTOOL_LINK_MODE_MASK_NBITS)) {

		netdev_err(netdev,

			   "unsupported requested advertisement\n");

		return -EINVAL;
@@ -349,12 +384,13 @@ static int xgbe_set_link_ksettings(struct net_device *netdev, 
	pdata->phy.autoneg = cmd->base.autoneg;

	pdata->phy.speed = speed;

	pdata->phy.duplex = cmd->base.duplex;

	pdata->phy.advertising = advertising;

	bitmap_copy(lks->link_modes.advertising, advertising,

		    __ETHTOOL_LINK_MODE_MASK_NBITS);



	if (cmd->base.autoneg == AUTONEG_ENABLE)

		pdata->phy.advertising |= ADVERTISED_Autoneg;

		XGBE_SET_ADV(lks, Autoneg);

	else

		pdata->phy.advertising &= ~ADVERTISED_Autoneg;

		XGBE_CLR_ADV(lks, Autoneg);



	if (netif_running(netdev))

		ret = pdata->phy_if.phy_config_aneg(pdata);