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Commit 016c366f authored by Tomer Maimon's avatar Tomer Maimon Committed by Arnd Bergmann
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arm: dts: modify clock binding in NPCM750 device tree 



Modify clock binding in a common device tree for all Nuvoton
NPCM750 BMCs.

Modify NPCM750 modules clock numbers accourding the new
clock driver.

Signed-off-by: default avatarTomer Maimon <tmaimon77@gmail.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 4828b20a

arch/arm/boot/dts/nuvoton-npcm750.dtsi

+44 −14
Original line number Original line Diff line number Diff line
@@ -17,7 +17,7 @@ 
		cpu@0 {

		cpu@0 {

			device_type = "cpu";

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			clocks = <&clk 10>;

			clocks = <&clk 0>;

			clock-names = "clk_cpu";

			clock-names = "clk_cpu";

			reg = <0>;

			reg = <0>;

			next-level-cache = <&l2>;

			next-level-cache = <&l2>;
@@ -26,31 +26,58 @@ 
		cpu@1 {

		cpu@1 {

			device_type = "cpu";

			device_type = "cpu";

			compatible = "arm,cortex-a9";

			compatible = "arm,cortex-a9";

			clocks = <&clk 10>;

			clocks = <&clk 0>;

			clock-names = "clk_cpu";

			clock-names = "clk_cpu";

			reg = <1>;

			reg = <1>;

			next-level-cache = <&l2>;

			next-level-cache = <&l2>;

		};

		};

	};

	};





	/* external reference clock */

	clk-refclk: clk-refclk {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <25000000>;

		clock-output-names = "refclk";

	};



	/* external reference clock for cpu. float in normal operation */

	clk-sysbypck: clk-sysbypck {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <800000000>;

		clock-output-names = "sysbypck";

	};



	/* external reference clock for MC. float in normal operation */

	clk-mcbypck: clk-mcbypck {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <800000000>;

		clock-output-names = "mcbypck";

	};



	 /* external clock signal rg1refck, supplied by the phy */

	 /* external clock signal rg1refck, supplied by the phy */

	clk-rg1refck {

	clk-rg1refck: clk-rg1refck {

		compatible = "fixed-clock";

		compatible = "fixed-clock";

		#clock-cells = <0>;

		#clock-cells = <0>;

		clock-frequency = <125000000>;

		clock-frequency = <125000000>;

		clock-output-names = "clk-rg1refck";

	};

	};





	/* external clock signal rg2refck, supplied by the phy */

	/* external clock signal rg2refck, supplied by the phy */

	clk-rg2refck {

	clk-rg2refck: clk-rg2refck {

		compatible = "fixed-clock";

		compatible = "fixed-clock";

		#clock-cells = <0>;

		#clock-cells = <0>;

		clock-frequency = <125000000>;

		clock-frequency = <125000000>;

		clock-output-names = "clk-rg2refck";

	};

	};





	clk-xin {

	clk-xin: clk-xin {

		compatible = "fixed-clock";

		compatible = "fixed-clock";

		#clock-cells = <0>;

		#clock-cells = <0>;

		clock-frequency = <50000000>;

		clock-frequency = <50000000>;

		clock-output-names = "clk-xin";

	};

	};





	soc {

	soc {
@@ -77,7 +104,7 @@ 
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;

			cache-unified;

			cache-unified;

			cache-level = <2>;

			cache-level = <2>;

			clocks = <&clk 22>;

			clocks = <&clk 10>;

			arm,shared-override;

			arm,shared-override;

		};

		};
@@ -94,7 +121,7 @@ 
			reg = <0x3fe600 0x20>;

			reg = <0x3fe600 0x20>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |

						  IRQ_TYPE_LEVEL_HIGH)>;

						  IRQ_TYPE_LEVEL_HIGH)>;

			clocks = <&clk 15>;

			clocks = <&clk 5>;

		};

		};

	};

	};
@@ -106,9 +133,12 @@ 
		ranges;

		ranges;





		clk: clock-controller@f0801000 {

		clk: clock-controller@f0801000 {

			compatible = "nuvoton,npcm750-clk";

			compatible = "nuvoton,npcm750-clk", "syscon";

			#clock-cells = <1>;

			#clock-cells = <1>;

			clock-controller;

			reg = <0xf0801000 0x1000>;

			reg = <0xf0801000 0x1000>;

			clock-names = "refclk", "sysbypck", "mcbypck";

			clocks = <&clk-refclk>, <&clk-sysbypck>, <&clk-mcbypck>;

		};

		};





		apb {

		apb {
@@ -122,7 +152,7 @@ 
				compatible = "nuvoton,npcm750-timer";

				compatible = "nuvoton,npcm750-timer";

				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

				reg = <0x8000 0x50>;

				reg = <0x8000 0x50>;

				clocks = <&clk 15>;

				clocks = <&clk 5>;

			};

			};





			watchdog0: watchdog@801C {

			watchdog0: watchdog@801C {
@@ -152,7 +182,7 @@ 
			serial0: serial@1000 {

			serial0: serial@1000 {

				compatible = "nuvoton,npcm750-uart";

				compatible = "nuvoton,npcm750-uart";

				reg = <0x1000 0x1000>;

				reg = <0x1000 0x1000>;

				clocks = <&clk 14>;

				clocks = <&clk 6>;

				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

				reg-shift = <2>;

				reg-shift = <2>;

				status = "disabled";

				status = "disabled";
@@ -161,7 +191,7 @@ 
			serial1: serial@2000 {

			serial1: serial@2000 {

				compatible = "nuvoton,npcm750-uart";

				compatible = "nuvoton,npcm750-uart";

				reg = <0x2000 0x1000>;

				reg = <0x2000 0x1000>;

				clocks = <&clk 14>;

				clocks = <&clk 6>;

				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;

				reg-shift = <2>;

				reg-shift = <2>;

				status = "disabled";

				status = "disabled";
@@ -170,7 +200,7 @@ 
			serial2: serial@3000 {

			serial2: serial@3000 {

				compatible = "nuvoton,npcm750-uart";

				compatible = "nuvoton,npcm750-uart";

				reg = <0x3000 0x1000>;

				reg = <0x3000 0x1000>;

				clocks = <&clk 14>;

				clocks = <&clk 6>;

				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;

				reg-shift = <2>;

				reg-shift = <2>;

				status = "disabled";

				status = "disabled";
@@ -179,7 +209,7 @@ 
			serial3: serial@4000 {

			serial3: serial@4000 {

				compatible = "nuvoton,npcm750-uart";

				compatible = "nuvoton,npcm750-uart";

				reg = <0x4000 0x1000>;

				reg = <0x4000 0x1000>;

				clocks = <&clk 14>;

				clocks = <&clk 6>;

				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

				reg-shift = <2>;

				reg-shift = <2>;

				status = "disabled";

				status = "disabled";