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Commit 01651324 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
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x86: Clarify/fix no-op barriers for text_poke_bp() 



So I was looking at text_poke_bp() today and I couldn't make sense of
the barriers there.

How's for something like so?

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: default avatarSteven Rostedt (VMware) <rostedt@goodmis.org>
Acked-by: default avatarJiri Kosina <jkosina@suse.cz>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: masami.hiramatsu.pt@hitachi.com
Link: http://lkml.kernel.org/r/20170731102154.f57cvkjtnbmtctk6@hirez.programming.kicks-ass.net


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent e137a4d8

arch/x86/kernel/alternative.c

+16 −6
Original line number Diff line number Diff line
@@ -742,7 +742,16 @@ static void *bp_int3_handler, *bp_int3_addr; 


int poke_int3_handler(struct pt_regs *regs)

{

	/* bp_patching_in_progress */

	/*

	 * Having observed our INT3 instruction, we now must observe

	 * bp_patching_in_progress.

	 *

	 * 	in_progress = TRUE		INT3

	 * 	WMB				RMB

	 * 	write INT3			if (in_progress)

	 *

	 * Idem for bp_int3_handler.

	 */

	smp_rmb();



	if (likely(!bp_patching_in_progress))
@@ -788,9 +797,8 @@ void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) 
	bp_int3_addr = (u8 *)addr + sizeof(int3);

	bp_patching_in_progress = true;

	/*

	 * Corresponding read barrier in int3 notifier for

	 * making sure the in_progress flags is correctly ordered wrt.

	 * patching

	 * Corresponding read barrier in int3 notifier for making sure the

	 * in_progress and handler are correctly ordered wrt. patching.

	 */

	smp_wmb();
@@ -815,9 +823,11 @@ void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) 
	text_poke(addr, opcode, sizeof(int3));



	on_each_cpu(do_sync_core, NULL, 1);



	/*

	 * sync_core() implies an smp_mb() and orders this store against

	 * the writing of the new instruction.

	 */

	bp_patching_in_progress = false;

	smp_wmb();



	return addr;

}