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Commit 00c25bce authored by Rik van Riel's avatar Rik van Riel Committed by Marcelo Tosatti
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KVM: VMX: increase ple_gap default to 128 

On some CPUs, a ple_gap of 41 is simply insufficient to ever trigger
PLE exits, even with the minimalistic PLE test from kvm-unit-tests.

http://git.kernel.org/?p=virt/kvm/kvm-unit-tests.git;a=commitdiff;h=eda71b28fa122203e316483b35f37aaacd42f545



For example, the Xeon X5670 CPU needs a ple_gap of at least 48 in
order to get pause loop exits:

# modprobe kvm_intel ple_gap=47
# taskset 1 /usr/local/bin/qemu-system-x86_64 \
  -device testdev,chardev=log -chardev stdio,id=log \
  -kernel x86/vmexit.flat -append ple-round-robin -smp 2
VNC server running on `::1:5900'
enabling apic
enabling apic
ple-round-robin 58298446
# rmmod kvm_intel
# modprobe kvm_intel ple_gap=48
# taskset 1 /usr/local/bin/qemu-system-x86_64 \
   -device testdev,chardev=log -chardev stdio,id=log \
   -kernel x86/vmexit.flat -append ple-round-robin -smp 2
VNC server running on `::1:5900'
enabling apic
enabling apic
ple-round-robin 36616

Increase the ple_gap to 128 to be on the safe side.

Signed-off-by: default avatarRik van Riel <riel@redhat.com>
Acked-by: default avatarZhai, Edwin <edwin.zhai@intel.com>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 3781c01c

arch/x86/kvm/vmx.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -93,14 +93,14 @@ module_param(yield_on_hlt, bool, S_IRUGO); 
 * These 2 parameters are used to config the controls for Pause-Loop Exiting:

 * These 2 parameters are used to config the controls for Pause-Loop Exiting:

 * ple_gap:    upper bound on the amount of time between two successive

 * ple_gap:    upper bound on the amount of time between two successive

 *             executions of PAUSE in a loop. Also indicate if ple enabled.

 *             executions of PAUSE in a loop. Also indicate if ple enabled.

 *             According to test, this time is usually small than 41 cycles.

 *             According to test, this time is usually smaller than 128 cycles.

 * ple_window: upper bound on the amount of time a guest is allowed to execute

 * ple_window: upper bound on the amount of time a guest is allowed to execute

 *             in a PAUSE loop. Tests indicate that most spinlocks are held for

 *             in a PAUSE loop. Tests indicate that most spinlocks are held for

 *             less than 2^12 cycles

 *             less than 2^12 cycles

 * Time is measured based on a counter that runs at the same rate as the TSC,

 * Time is measured based on a counter that runs at the same rate as the TSC,

 * refer SDM volume 3b section 21.6.13 & 22.1.3.

 * refer SDM volume 3b section 21.6.13 & 22.1.3.

 */

 */

#define KVM_VMX_DEFAULT_PLE_GAP    41

#define KVM_VMX_DEFAULT_PLE_GAP    128

#define KVM_VMX_DEFAULT_PLE_WINDOW 4096

#define KVM_VMX_DEFAULT_PLE_WINDOW 4096

static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;

static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;

module_param(ple_gap, int, S_IRUGO);

module_param(ple_gap, int, S_IRUGO);