Commit ff474e8c authored Sep 03, 2015 by Linus Torvalds

linux

Pull powerpc updates from Michael Ellerman:

 - support "hybrid" iommu/direct DMA ops for coherent_mask < dma_mask
   from Benjamin Herrenschmidt

 - EEH fixes for SRIOV from Gavin

 - introduce rtas_get_sensor_fast() for IRQ handlers from Thomas Huth

 - use hardware RNG for arch_get_random_seed_* not arch_get_random_*
   from Paul Mackerras

 - seccomp filter support from Michael Ellerman

 - opal_cec_reboot2() handling for HMIs & machine checks from Mahesh
   Salgaonkar

 - add powerpc timebase as a trace clock source from Naveen N.  Rao

 - misc cleanups in the xmon, signal & SLB code from Anshuman Khandual

 - add an inline function to update POWER8 HID0 from Gautham R.  Shenoy

 - fix pte_pagesize_index() crash on 4K w/64K hash from Michael Ellerman

 - drop support for 64K local store on 4K kernels from Michael Ellerman

 - move dma_get_required_mask() from pnv_phb to pci_controller_ops from
   Andrew Donnellan

 - initialize distance lookup table from drconf path from Nikunj A
   Dadhania

 - enable RTC class support from Vaibhav Jain

 - disable automatically blocked PCI config from Gavin Shan

 - add LEDs driver for PowerNV platform from Vasant Hegde

 - fix endianness issues in the HVSI driver from Laurent Dufour

 - kexec endian fixes from Samuel Mendoza-Jonas

 - fix corrupted pdn list from Gavin Shan

 - fix fenced PHB caused by eeh_slot_error_detail() from Gavin Shan

 - Freescale updates from Scott: Highlights include 32-bit memcpy/memset
   optimizations, checksum optimizations, 85xx config fragments and
   updates, device tree updates, e6500 fixes for non-SMP, and misc
   cleanup and minor fixes.

 - a ton of cxl updates & fixes:
    - add explicit precision specifiers from Rasmus Villemoes
    - use more common format specifier from Rasmus Villemoes
    - destroy cxl_adapter_idr on module_exit from Johannes Thumshirn
    - destroy afu->contexts_idr on release of an afu from Johannes
      Thumshirn
    - compile with -Werror from Daniel Axtens
    - EEH support from Daniel Axtens
    - plug irq_bitmap getting leaked in cxl_context from Vaibhav Jain
    - add alternate MMIO error handling from Ian Munsie
    - allow release of contexts which have been OPENED but not STARTED
      from Andrew Donnellan
    - remove use of macro DEFINE_PCI_DEVICE_TABLE from Vaishali Thakkar
    - release irqs if memory allocation fails from Vaibhav Jain
    - remove racy attempt to force EEH invocation in reset from Daniel
      Axtens
    - fix + cleanup error paths in cxl_dev_context_init from Ian Munsie
    - fix force unmapping mmaps of contexts allocated through the kernel
      api from Ian Munsie
    - set up and enable PSL Timebase from Philippe Bergheaud

* tag 'powerpc-4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (140 commits)
  cxl: Set up and enable PSL Timebase
  cxl: Fix force unmapping mmaps of contexts allocated through the kernel api
  cxl: Fix + cleanup error paths in cxl_dev_context_init
  powerpc/eeh: Fix fenced PHB caused by eeh_slot_error_detail()
  powerpc/pseries: Cleanup on pci_dn_reconfig_notifier()
  powerpc/pseries: Fix corrupted pdn list
  powerpc/powernv: Enable LEDS support
  powerpc/iommu: Set default DMA offset in dma_dev_setup
  cxl: Remove racy attempt to force EEH invocation in reset
  cxl: Release irqs if memory allocation fails
  cxl: Remove use of macro DEFINE_PCI_DEVICE_TABLE
  powerpc/powernv: Fix mis-merge of OPAL support for LEDS driver
  powerpc/powernv: Reset HILE before kexec_sequence()
  powerpc/kexec: Reset secondary cpu endianness before kexec
  powerpc/hvsi: Fix endianness issues in the HVSI driver
  leds/powernv: Add driver for PowerNV platform
  powerpc/powernv: Create LED platform device
  powerpc/powernv: Add OPAL interfaces for accessing and modifying system LED states
  powerpc/powernv: Fix the log message when disabling VF
  cxl: Allow release of contexts which have been OPENED but not STARTED
  ...

parents 4c92b5bb 390fd592

Documentation/ABI/testing/sysfs-class-cxl

+10 −0

Original line number	Diff line number	Diff line
		@@ -223,3 +223,13 @@ Description: write only
		Writing 1 will issue a PERST to card which may cause the card
		to reload the FPGA depending on load_image_on_perst.
		Users: https://github.com/ibm-capi/libcxl

		What: /sys/class/cxl/<card>/perst_reloads_same_image
		Date: July 2015
		Contact: linuxppc-dev@lists.ozlabs.org
		Description: read/write
		Trust that when an image is reloaded via PERST, it will not
		have changed.
		0 = don't trust, the image may be different (default)
		1 = trust that the image will not change.
		Users: https://github.com/ibm-capi/libcxl

Documentation/devicetree/bindings/leds/leds-powernv.txt

0 → 100644

+26 −0

Original line number	Diff line number	Diff line
		Device Tree binding for LEDs on IBM Power Systems
		-------------------------------------------------

		Required properties:
		- compatible : Should be "ibm,opal-v3-led".
		- led-mode : Should be "lightpath" or "guidinglight".

		Each location code of FRU/Enclosure must be expressed in the
		form of a sub-node.

		Required properties for the sub nodes:
		- led-types : Supported LED types (attention/identify/fault) provided
		in the form of string array.

		Example:

		leds {
		compatible = "ibm,opal-v3-led";
		led-mode = "lightpath";

		U78C9.001.RST0027-P1-C1 {
		led-types = "identify", "fault";
		};
		...
		...
		};

Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt

+3 −0

Original line number	Diff line number	Diff line
		@@ -18,6 +18,8 @@ Properties:
		interrupt (NAND_EVTER_STAT). If there is only one,
		that interrupt reports both types of event.

		- little-endian : If this property is absent, the big-endian mode will
		be in use as default for registers.

		- ranges : Each range corresponds to a single chipselect, and covers
		the entire access window as configured.
		@@ -34,6 +36,7 @@ Example:
		#size-cells = <1>;
		reg = <0x0 0xffe1e000 0 0x2000>;
		interrupts = <16 2 19 2>;
		little-endian;

		/* NOR, NAND Flashes and CPLD on board */
		ranges = <0x0 0x0 0x0 0xee000000 0x02000000

Documentation/devicetree/bindings/powerpc/fsl/scfg.txt

0 → 100644

+18 −0

Original line number	Diff line number	Diff line
		Freescale Supplement configuration unit (SCFG)

		SCFG is the supplemental configuration unit, that provides SoC specific
		configuration and status registers for the chip. Such as getting PEX port
		status.

		Required properties:

		- compatible: should be "fsl,<chip>-scfg"
		- reg: should contain base address and length of SCFG memory-mapped
		registers

		Example:

		scfg: global-utilities@fc000 {
		compatible = "fsl,t1040-scfg";
		reg = <0xfc000 0x1000>;
		};

Documentation/trace/ftrace.txt

+5 −0

Original line number	Diff line number	Diff line
		@@ -346,6 +346,11 @@ of ftrace. Here is a list of some of the key files:
		x86-tsc: Architectures may define their own clocks. For
		example, x86 uses its own TSC cycle clock here.

		ppc-tb: This uses the powerpc timebase register value.
		This is in sync across CPUs and can also be used
		to correlate events across hypervisor/guest if
		tb_offset is known.

		To set a clock, simply echo the clock name into this file.

		echo global > trace_clock