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Commit ff050ad1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC specific changes from Arnd Bergmann:
 "Lots of changes specific to one of the SoC families.  Some that stick
  out are:

   - mach-qcom gains new features, most importantly SMP support for the
     newer chips (Stephen Boyd, Rohit Vaswani)
   - mvebu gains support for three new SoCs: Armada 375, 380 and 385
     (Thomas Petazzoni and Free-electrons team)
   - SMP support for Rockchips (Heiko Stübner)
   - Lots of i.MX changes (Shawn Guo)
   - Added support for BCM5301x SoC (Hauke Mehrtens)
   - Multiplatform support for Marvell Kirkwood and Dove (Andrew Lunn
     and Sebastian Hesselbarth doing the final part of a long journey)
   - Unify davinci platforms and remove obsolete ones (Sekhar Nori, Arnd
     Bergmann)"

* tag 'soc-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (126 commits)
  ARM: sunxi: Select HAVE_ARM_ARCH_TIMER
  ARM: cache-tauros2: remove ARMv6 code
  ARM: mvebu: don't select CONFIG_NEON
  ARM: davinci: fix DT booting with default defconfig
  ARM: configs: bcm_defconfig: enable bcm590xx regulator support
  ARM: davinci: remove tnetv107x support
  MAINTAINERS: Update ARM STi maintainers
  ARM: restrict BCM_KONA_UART to ARCH_BCM_MOBILE
  ARM: bcm21664: Add board support.
  ARM: sunxi: Add the new watchog compatibles to the reboot code
  ARM: enable ARM_HAS_SG_CHAIN for multiplatform
  ARM: davinci: remove da8xx_omapl_defconfig
  ARM: davinci: da8xx: fix multiple watchdog device registration
  ARM: davinci: add da8xx specific configs to davinci_all_defconfig
  ARM: davinci: enable da8xx build concurrently with older devices
  ARM: BCM5301X: workaround suppress fault
  ARM: BCM5301X: add early debugging support
  ARM: BCM5301X: initial support for the BCM5301X/BCM470X SoCs with ARM CPU
  ARM: mach-bcm: Remove GENERIC_TIME
  ARM: shmobile: APMU: Fix warnings due to improper printk formats
  ...
parents dfc25e45 9233087d
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+11 −1
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@@ -83,14 +83,24 @@ EBU Armada family
        88F6710
        88F6707
        88F6W11
    Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf

  Armada 375 Flavors:
	88F6720
    Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA_375_SoC-01_product_brief.pdf

  Armada 380/385 Flavors:
	88F6810
	88F6820
	88F6828

  Armada XP Flavors:
        MV78230
        MV78260
        MV78460
    NOTE: not to be confused with the non-SMP 78xx0 SoCs

    Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf

  No public datasheet available.

  Core: Sheeva ARMv7 compatible
+9 −0
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Marvell Armada 375 Platforms Device Tree Bindings
-------------------------------------------------

Boards with a SoC of the Marvell Armada 375 family shall have the
following property:

Required root node property:

compatible: must contain "marvell,armada375"
+10 −0
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Marvell Armada 38x Platforms Device Tree Bindings
-------------------------------------------------

Boards with a SoC of the Marvell Armada 38x family shall have the
following property:

Required root node property:

 - compatible: must contain either "marvell,armada380" or
   "marvell,armada385" depending on the variant of the SoC being used.
+8 −0
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Broadcom BCM4708 device tree bindings
-------------------------------------------

Boards with the BCM4708 SoC shall have the following properties:

Required root node property:

compatible = "brcm,bcm4708";
+24 −1
Original line number Diff line number Diff line
@@ -180,7 +180,11 @@ nodes to be present and contain the properties described below.
			  be one of:
			     "spin-table"
			     "psci"
			# On ARM 32-bit systems this property is optional.
			# On ARM 32-bit systems this property is optional and
			  can be one of:
			    "qcom,gcc-msm8660"
			    "qcom,kpss-acc-v1"
			    "qcom,kpss-acc-v2"

	- cpu-release-addr
		Usage: required for systems that have an "enable-method"
@@ -191,6 +195,21 @@ nodes to be present and contain the properties described below.
			  property identifying a 64-bit zero-initialised
			  memory location.

	- qcom,saw
		Usage: required for systems that have an "enable-method"
		       property value of "qcom,kpss-acc-v1" or
		       "qcom,kpss-acc-v2"
		Value type: <phandle>
		Definition: Specifies the SAW[1] node associated with this CPU.

	- qcom,acc
		Usage: required for systems that have an "enable-method"
		       property value of "qcom,kpss-acc-v1" or
		       "qcom,kpss-acc-v2"
		Value type: <phandle>
		Definition: Specifies the ACC[2] node associated with this CPU.


Example 1 (dual-cluster big.LITTLE system 32-bit):

	cpus {
@@ -382,3 +401,7 @@ cpus {
		cpu-release-addr = <0 0x20000000>;
	};
};

--
[1] arm/msm/qcom,saw2.txt
[2] arm/msm/qcom,kpss-acc.txt
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