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Commit fea3158c authored by Jean-Christophe PLAGNIOL-VILLARD's avatar Jean-Christophe PLAGNIOL-VILLARD Committed by Nicolas Ferre
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ARM: at91: add at91sam9g20 and Calao USB A9G20 DT support

parent 49fe2ba3
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/*
 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
 *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9G20 family SoC";
	compatible = "atmel,at91sam9g20";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		serial5 = &usart4;
		serial6 = &usart5;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory@20000000 {
		reg = <0x20000000 0x08000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <1>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				interrupt-parent;
				reg = <0xfffff000 0x200>;
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1>;
				status = "disabled";
			};

			usart0: serial@fffb0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb0000 0x200>;
				interrupts = <6>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@fffb4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb4000 0x200>;
				interrupts = <7>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@fffb8000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb8000 0x200>;
				interrupts = <8>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@fffd0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd0000 0x200>;
				interrupts = <23>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart4: serial@fffd4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd4000 0x200>;
				interrupts = <24>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart5: serial@fffd8000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd8000 0x200>;
				interrupts = <25>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};
		};
	};
};
+30 −0
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/*
 * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board
 *
 *  Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 or later.
 */
/dts-v1/;
/include/ "at91sam9g20.dtsi"

/ {
	model = "Calao USB A9G20";
	compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";

	chosen {
		bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:128k(at91bootstrap),256k(barebox)ro,128k(bareboxenv),128k(bareboxenv2),4M(kernel),120M(rootfs),-(data) root=/dev/mtdblock5 rw rootfstype=ubifs";
	};

	memory@20000000 {
		reg = <0x20000000 0x4000000>;
	};

	ahb {
		apb {
			dbgu: serial@fffff200 {
				status = "okay";
			};
		};
	};
};
+1 −1
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@@ -17,4 +17,4 @@ params_phys-y := 0x20000100
initrd_phys-y	:= 0x20410000
endif

dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb
dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb usb_a9g20.dtb
+8 −0
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@@ -199,6 +199,14 @@ static struct clk_lookup periph_clocks_lookups[] = {
	CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
	CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
	CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
	/* more usart lookup table for DT entries */
	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
	CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
	CLKDEV_CON_DEV_ID("usart", "fffb4000.serial", &usart1_clk),
	CLKDEV_CON_DEV_ID("usart", "fffb8000.serial", &usart2_clk),
	CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
	CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
	CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
};

static struct clk_lookup usart_clocks_lookups[] = {
+1 −0
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@@ -108,6 +108,7 @@ static void __init at91_dt_device_init(void)

static const char *at91_dt_board_compat[] __initdata = {
	"atmel,at91sam9m10g45ek",
	"calao,usb-a9g20",
	NULL
};