Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fe78d0b7 authored by Koji Matsuoka's avatar Koji Matsuoka Committed by Mark Brown
Browse files

spi: sh-msiof: Fix FIFO size to 64 word from 256 word 



The upper limit of Tx/Rx FIFO size is 64 word by the
specification of H/W. This patch corrects to 64 word from 256 word.

Signed-off-by: default avatarKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
parent f6d1b3e2

drivers/spi/spi-sh-msiof.c

+9 −6
Original line number Diff line number Diff line
@@ -48,8 +48,8 @@ struct sh_msiof_spi_priv { 
	const struct sh_msiof_chipdata *chipdata;

	struct sh_msiof_spi_info *info;

	struct completion done;

	int tx_fifo_size;

	int rx_fifo_size;

	unsigned int tx_fifo_size;

	unsigned int rx_fifo_size;

	void *tx_dma_page;

	void *rx_dma_page;

	dma_addr_t tx_dma_addr;
@@ -95,8 +95,6 @@ struct sh_msiof_spi_priv { 
#define MDR2_WDLEN1(i)	(((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */

#define MDR2_GRPMASK1	0x00000001 /* Group Output Mask 1 (SH, A1) */



#define MAX_WDLEN	256U



/* TSCR and RSCR */

#define SCR_BRPS_MASK	    0x1f00 /* Prescaler Setting (1-32) */

#define SCR_BRPS(i)	(((i) - 1) << 8)
@@ -850,7 +848,12 @@ static int sh_msiof_transfer_one(struct spi_master *master, 
		 *  DMA supports 32-bit words only, hence pack 8-bit and 16-bit

		 *  words, with byte resp. word swapping.

		 */

		unsigned int l = min(len, MAX_WDLEN * 4);

		unsigned int l = 0;



		if (tx_buf)

			l = min(len, p->tx_fifo_size * 4);

		if (rx_buf)

			l = min(len, p->rx_fifo_size * 4);



		if (bits <= 8) {

			if (l & 3)
@@ -963,7 +966,7 @@ static const struct sh_msiof_chipdata sh_data = { 


static const struct sh_msiof_chipdata r8a779x_data = {

	.tx_fifo_size = 64,

	.rx_fifo_size = 256,

	.rx_fifo_size = 64,

	.master_flags = SPI_MASTER_MUST_TX,

};