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Commit fdd83974 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'tegra/cleanups' into next/cleanup2

parents accf709b ed1b4acc

arch/arm/boot/dts/tegra-paz00.dts

+3 −3
Original line number Diff line number Diff line
@@ -46,11 +46,11 @@ 
	};



	serial@70006200 {

		status = "disable";

		clock-frequency = <216000000>;

	};



	serial@70006300 {

		clock-frequency = <216000000>;

		status = "disable";

	};



	serial@70006400 {
@@ -60,7 +60,7 @@ 
	sdhci@c8000000 {

		cd-gpios = <&gpio 173 0>; /* gpio PV5 */

		wp-gpios = <&gpio 57 0>;  /* gpio PH1 */

		power-gpios = <&gpio 155 0>; /* gpio PT3 */

		power-gpios = <&gpio 169 0>; /* gpio PV1 */

	};



	sdhci@c8000200 {

arch/arm/mach-tegra/Kconfig

+16 −2
Original line number Diff line number Diff line
@@ -8,8 +8,16 @@ config ARCH_TEGRA_2x_SOC 
	select ARM_GIC

	select ARCH_REQUIRE_GPIOLIB

	select USB_ARCH_HAS_EHCI if USB_SUPPORT

	select USB_ULPI if USB_SUPPORT

	select USB_ULPI if USB

	select USB_ULPI_VIEWPORT if USB_SUPPORT

	select ARM_ERRATA_720789

	select ARM_ERRATA_742230

	select ARM_ERRATA_751472

	select ARM_ERRATA_754327

	select ARM_ERRATA_764369

	select PL310_ERRATA_727915 if CACHE_L2X0

	select PL310_ERRATA_769419 if CACHE_L2X0

	select CPU_FREQ_TABLE if CPU_FREQ

	help

	  Support for NVIDIA Tegra AP20 and T20 processors, based on the

	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -20,9 +28,15 @@ config ARCH_TEGRA_3x_SOC 
	select ARM_GIC

	select ARCH_REQUIRE_GPIOLIB

	select USB_ARCH_HAS_EHCI if USB_SUPPORT

	select USB_ULPI if USB_SUPPORT

	select USB_ULPI if USB

	select USB_ULPI_VIEWPORT if USB_SUPPORT

	select USE_OF

	select ARM_ERRATA_743622

	select ARM_ERRATA_751472

	select ARM_ERRATA_754322

	select ARM_ERRATA_764369

	select PL310_ERRATA_769419 if CACHE_L2X0

	select CPU_FREQ_TABLE if CPU_FREQ

	help

	  Support for NVIDIA Tegra T30 processor family, based on the

	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

arch/arm/mach-tegra/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -13,7 +13,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o 
obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= pinmux-tegra20-tables.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pinmux-tegra30-tables.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= board-dt-tegra30.o

obj-$(CONFIG_SMP)                       += platsmp.o localtimer.o headsmp.o

obj-$(CONFIG_SMP)			+= platsmp.o headsmp.o

obj-$(CONFIG_LOCAL_TIMERS)		+= localtimer.o

obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o

obj-$(CONFIG_TEGRA_SYSTEM_DMA)		+= dma.o

obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o

arch/arm/mach-tegra/board-harmony-pinmux.c

+3 −3
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = { 
	{TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_GPU,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},
@@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = { 
	{TEGRA_PINGROUP_SDC,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_SDD,   TEGRA_MUX_PWM,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

	{TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},

	{TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

arch/arm/mach-tegra/board-paz00.c

+4 −4
Original line number Diff line number Diff line
@@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { 
		.uartclk	= 216000000,

	}, {

		/* serial port on mini-pcie */

		.membase	= IO_ADDRESS(TEGRA_UARTD_BASE),

		.mapbase	= TEGRA_UARTD_BASE,

		.irq		= INT_UARTD,

		.membase	= IO_ADDRESS(TEGRA_UARTC_BASE),

		.mapbase	= TEGRA_UARTC_BASE,

		.irq		= INT_UARTC,

		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,

		.type		= PORT_TEGRA,

		.iotype		= UPIO_MEM,
@@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, 
static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {

	/* name		parent		rate		enabled */

	{ "uarta",	"pll_p",	216000000,	true },

	{ "uartd",	"pll_p",	216000000,	true },

	{ "uartc",	"pll_p",	216000000,	true },



	{ "pll_p_out4",	"pll_p",	24000000,	true },

	{ "usbd",	"clk_m",	12000000,	false },