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Commit fdbd3ce9 authored by Yinghai Lu's avatar Yinghai Lu Committed by Jesse Barnes
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PCI: pciehp: Retrieve link speed after link is trained



During hot plug, board_added will call pciehp_power_on_slot().
But link speed is updated in pciehp_power_on_slot().

We should not update link speed there, because that is too early.

So move the link speed update to pciehp_check_link_status() after making
sure the link has been trained.

-v2: fix compile warning that Kenji found.

Signed-off-by: default avatarYinghai Lu <yinghai.lu@oracle.com>
Reviewed-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Tested-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent c54420d3
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+2 −9
Original line number Diff line number Diff line
@@ -294,6 +294,8 @@ int pciehp_check_link_status(struct controller *ctrl)
		return retval;
	}

	pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);

	return retval;
}

@@ -484,7 +486,6 @@ int pciehp_power_on_slot(struct slot * slot)
	u16 slot_cmd;
	u16 cmd_mask;
	u16 slot_status;
	u16 lnk_status;
	int retval = 0;

	/* Clear sticky power-fault bit from previous power failures */
@@ -516,14 +517,6 @@ int pciehp_power_on_slot(struct slot * slot)
	ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__,
		 pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd);

	retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status);
	if (retval) {
		ctrl_err(ctrl, "%s: Cannot read LNKSTA register\n",
				__func__);
		return retval;
	}
	pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);

	return retval;
}