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Commit fcbf1dfd authored by David Daney's avatar David Daney Committed by Ralf Baechle
Browse files

MIPS: Introduce board_cache_error_setup() hook.



This is used in subsequent patches.

Signed-off-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3819/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 36be5051
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+1 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ extern void (*board_nmi_handler_setup)(void);
extern void (*board_ejtag_handler_setup)(void);
extern void (*board_bind_eic_interrupt)(int irq, int regset);
extern void (*board_ebase_setup)(void);
extern void (*board_cache_error_setup)(void);

extern int register_nmi_notifier(struct notifier_block *nb);

+4 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ void (*board_nmi_handler_setup)(void);
void (*board_ejtag_handler_setup)(void);
void (*board_bind_eic_interrupt)(int irq, int regset);
void (*board_ebase_setup)(void);

void __cpuinitdata(*board_cache_error_setup)(void);

static void show_raw_backtrace(unsigned long reg29)
{
@@ -1797,6 +1797,9 @@ void __init trap_init(void)

	set_except_vector(26, handle_dsp);

	if (board_cache_error_setup)
		board_cache_error_setup();

	if (cpu_has_vce)
		/* Special exception: R4[04]00 uses also the divec space. */
		memcpy((void *)(ebase + 0x180), &except_vec3_r4000, 0x100);