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Commit fc9ee228 authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Simon Horman
Browse files

ARM: dts: r8a7793: Add SDHI controllers 



Same as on r8a7791.

Signed-off-by: default avatarUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 21c7d0fc

arch/arm/boot/dts/r8a7793.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -507,6 +507,39 @@ 
		reg = <0 0xe6060000 0 0x250>;

	};



	sdhi0: sd@ee100000 {

		compatible = "renesas,sdhi-r8a7793";

		reg = <0 0xee100000 0 0x328>;

		interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7793_CLK_SDHI0>;

		dmas = <&dmac0 0xcd>, <&dmac0 0xce>;

		dma-names = "tx", "rx";

		power-domains = <&cpg_clocks>;

		status = "disabled";

	};



	sdhi1: sd@ee140000 {

		compatible = "renesas,sdhi-r8a7793";

		reg = <0 0xee140000 0 0x100>;

		interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7793_CLK_SDHI1>;

		dmas = <&dmac0 0xc1>, <&dmac0 0xc2>;

		dma-names = "tx", "rx";

		power-domains = <&cpg_clocks>;

		status = "disabled";

	};



	sdhi2: sd@ee160000 {

		compatible = "renesas,sdhi-r8a7793";

		reg = <0 0xee160000 0 0x100>;

		interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp3_clks R8A7793_CLK_SDHI2>;

		dmas = <&dmac0 0xd3>, <&dmac0 0xd4>;

		dma-names = "tx", "rx";

		power-domains = <&cpg_clocks>;

		status = "disabled";

	};



	scifa0: serial@e6c40000 {

		compatible = "renesas,scifa-r8a7793",

			     "renesas,rcar-gen2-scifa", "renesas,scifa";