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Commit fc30b8ef authored by Dave Airlie's avatar Dave Airlie Committed by Dave Airlie
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drm/radeon/kms: move around new init path code to avoid posting at init



We really don't want to post the card at init, it takes a relatively
long time and isn't required, so split the resume path into
a startup path called by both init/resume and separate resume
entry point to do posting.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent bc1a631e
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+29 −23
Original line number Diff line number Diff line
@@ -157,31 +157,10 @@ static void r420_clock_resume(struct radeon_device *rdev)
	WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
}

int r420_resume(struct radeon_device *rdev)
static int r420_startup(struct radeon_device *rdev)
{
	int r;

	/* Make sur GART are not working */
	if (rdev->flags & RADEON_IS_PCIE)
		rv370_pcie_gart_disable(rdev);
	if (rdev->flags & RADEON_IS_PCI)
		r100_pci_gart_disable(rdev);
	/* Resume clock before doing reset */
	r420_clock_resume(rdev);
	/* Reset gpu before posting otherwise ATOM will enter infinite loop */
	if (radeon_gpu_reset(rdev)) {
		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
			RREG32(R_000E40_RBBM_STATUS),
			RREG32(R_0007C0_CP_STAT));
	}
	/* check if cards are posted or not */
	if (rdev->is_atom_bios) {
		atom_asic_init(rdev->mode_info.atom_context);
	} else {
		radeon_combios_asic_init(rdev->ddev);
	}
	/* Resume clock after posting */
	r420_clock_resume(rdev);
	r300_mc_program(rdev);
	/* Initialize GART (initialize after TTM so we can allocate
	 * memory through TTM but finalize after TTM) */
@@ -217,6 +196,33 @@ int r420_resume(struct radeon_device *rdev)
	return 0;
}

int r420_resume(struct radeon_device *rdev)
{
	/* Make sur GART are not working */
	if (rdev->flags & RADEON_IS_PCIE)
		rv370_pcie_gart_disable(rdev);
	if (rdev->flags & RADEON_IS_PCI)
		r100_pci_gart_disable(rdev);
	/* Resume clock before doing reset */
	r420_clock_resume(rdev);
	/* Reset gpu before posting otherwise ATOM will enter infinite loop */
	if (radeon_gpu_reset(rdev)) {
		dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
			RREG32(R_000E40_RBBM_STATUS),
			RREG32(R_0007C0_CP_STAT));
	}
	/* check if cards are posted or not */
	if (rdev->is_atom_bios) {
		atom_asic_init(rdev->mode_info.atom_context);
	} else {
		radeon_combios_asic_init(rdev->ddev);
	}
	/* Resume clock after posting */
	r420_clock_resume(rdev);

	return r420_startup(rdev);
}

int r420_suspend(struct radeon_device *rdev)
{
	r100_cp_disable(rdev);
@@ -330,7 +336,7 @@ int r420_init(struct radeon_device *rdev)
	}
	r300_set_reg_safe(rdev);
	rdev->accel_working = true;
	r = r420_resume(rdev);
	r = r420_startup(rdev);
	if (r) {
		/* Somethings want wront with the accel init stop accel */
		dev_err(rdev->dev, "Disabling GPU acceleration\n");
+36 −2
Original line number Diff line number Diff line
@@ -1466,7 +1466,7 @@ bool r600_card_posted(struct radeon_device *rdev)
	return false;
}

int r600_resume(struct radeon_device *rdev)
int r600_startup(struct radeon_device *rdev)
{
	int r;

@@ -1499,6 +1499,40 @@ int r600_resume(struct radeon_device *rdev)
	return 0;
}

int r600_resume(struct radeon_device *rdev)
{
	int r;

	if (radeon_gpu_reset(rdev)) {
		/* FIXME: what do we want to do here ? */
	}
	/* post card */
	if (rdev->is_atom_bios) {
		atom_asic_init(rdev->mode_info.atom_context);
	} else {
		radeon_combios_asic_init(rdev->ddev);
	}
	/* Initialize clocks */
	r = radeon_clocks_init(rdev);
	if (r) {
		return r;
	}

	r = r600_startup(rdev);
	if (r) {
		DRM_ERROR("r600 startup failed on resume\n");
		return r;
	}

	r = radeon_ib_test(rdev);
	if (r) {
		DRM_ERROR("radeon: failled testing IB (%d).\n", r);
		return r;
	}
	return r;
}


int r600_suspend(struct radeon_device *rdev)
{
	/* FIXME: we should wait for ring to be empty */
@@ -1596,7 +1630,7 @@ int r600_init(struct radeon_device *rdev)
		return r;
	}

	r = r600_resume(rdev);
	r = r600_startup(rdev);
	if (r) {
		if (rdev->flags & RADEON_IS_AGP) {
			/* Retry with disabling AGP */
+36 −2
Original line number Diff line number Diff line
@@ -851,7 +851,7 @@ int rv770_gpu_reset(struct radeon_device *rdev)
	return 0;
}

int rv770_resume(struct radeon_device *rdev)
static int rv770_startup(struct radeon_device *rdev)
{
	int r;

@@ -875,6 +875,40 @@ int rv770_resume(struct radeon_device *rdev)
	return 0;
}

int rv770_resume(struct radeon_device *rdev)
{
	int r;

	if (radeon_gpu_reset(rdev)) {
		/* FIXME: what do we want to do here ? */
	}
	/* post card */
	if (rdev->is_atom_bios) {
		atom_asic_init(rdev->mode_info.atom_context);
	} else {
		radeon_combios_asic_init(rdev->ddev);
	}
	/* Initialize clocks */
	r = radeon_clocks_init(rdev);
	if (r) {
		return r;
	}

	r = rv770_startup(rdev);
	if (r) {
		DRM_ERROR("r600 startup failed on resume\n");
		return r;
	}

	r = radeon_ib_test(rdev);
	if (r) {
		DRM_ERROR("radeon: failled testing IB (%d).\n", r);
		return r;
	}
	return r;

}

int rv770_suspend(struct radeon_device *rdev)
{
	/* FIXME: we should wait for ring to be empty */
@@ -959,7 +993,7 @@ int rv770_init(struct radeon_device *rdev)
		return r;

	rdev->accel_working = true;
	r = rv770_resume(rdev);
	r = rv770_startup(rdev);
	if (r) {
		if (rdev->flags & RADEON_IS_AGP) {
			/* Retry with disabling AGP */