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Commit faee9a5d authored by Andi Kleen's avatar Andi Kleen Committed by Linus Torvalds
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[PATCH] i386/x86-64: Use new official CPUID to get APICID/core split on AMD platforms 



Previously the apicid<->coreid split was computed based on the max
number of cores. Now use a new CPUID AMD defined for that. On most
systems right now it should be 0 and the old method will be used.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 79121ea9

arch/i386/kernel/cpu/amd.c

+8 −6
Original line number Diff line number Diff line
@@ -224,15 +224,17 @@ static void __init init_amd(struct cpuinfo_x86 *c) 


#ifdef CONFIG_X86_HT

	/*

	 * On a AMD dual core setup the lower bits of the APIC id

	 * distingush the cores.  Assumes number of cores is a power

	 * of two.

	 * On a AMD multi core setup the lower bits of the APIC id

	 * distingush the cores.

	 */

	if (c->x86_max_cores > 1) {

		int cpu = smp_processor_id();

		unsigned bits = 0;

		unsigned bits = (cpuid_ecx(0x80000008) >> 12) & 0xf;



		if (bits == 0) {

			while ((1 << bits) < c->x86_max_cores)

				bits++;

		}

		cpu_core_id[cpu] = phys_proc_id[cpu] & ((1<<bits)-1);

		phys_proc_id[cpu] >>= bits;

		printk(KERN_INFO "CPU %d(%d) -> Core %d\n",

arch/x86_64/kernel/setup.c

+13 −7
Original line number Diff line number Diff line
@@ -873,10 +873,18 @@ static void __init amd_detect_cmp(struct cpuinfo_x86 *c) 
	int node = 0;

	unsigned apicid = hard_smp_processor_id();

#endif

	unsigned ecx = cpuid_ecx(0x80000008);



	bits = 0;

	c->x86_max_cores = (ecx & 0xff) + 1;



	/* CPU telling us the core id bits shift? */

	bits = (ecx >> 12) & 0xF;



	/* Otherwise recompute */

	if (bits == 0) {

		while ((1 << bits) < c->x86_max_cores)

			bits++;

	}



	/* Low order bits define the core id (index of core in socket) */

	cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
@@ -964,11 +972,9 @@ static int __init init_amd(struct cpuinfo_x86 *c) 
	if (c->x86_power & (1<<8))

		set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);



	if (c->extended_cpuid_level >= 0x80000008) {

		c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;



	/* Multi core CPU? */

	if (c->extended_cpuid_level >= 0x80000008)

		amd_detect_cmp(c);

	}



	return r;

}