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Commit fa759e9b authored by Michael Neuling's avatar Michael Neuling Committed by Benjamin Herrenschmidt
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powerpc: Add DSCR FSCR register bit definition 



This sets the DSCR (Data Stream Control Register) in the FSCR (Facility Status
& Control Register).

Also harmonise TAR (Target Address Register) FSCR bit definition too.

Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 57d23167

arch/powerpc/include/asm/reg.h

+2 −1
Original line number Diff line number Diff line
@@ -266,7 +266,8 @@ 
#define SPRN_HSRR0	0x13A	/* Hypervisor Save/Restore 0 */

#define SPRN_HSRR1	0x13B	/* Hypervisor Save/Restore 1 */

#define SPRN_FSCR	0x099	/* Facility Status & Control Register */

#define FSCR_TAR	(1<<8)	/* Enable Target Adress Register */

#define   FSCR_TAR	(1 << (63-55)) /* Enable Target Address Register */

#define   FSCR_DSCR	(1 << (63-61)) /* Enable Data Stream Control Register */

#define SPRN_TAR	0x32f	/* Target Address Register */

#define SPRN_LPCR	0x13E	/* LPAR Control Register */

#define   LPCR_VPM0	(1ul << (63-0))