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Commit f9c15a1b authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-fixes-for-v3.5-rc1' of... 

Merge tag 'omap-fixes-for-v3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

The biggest fix here is the long pending patch mux UART pins so PM
retention idle works again.

Also included are few other PM wake-up related fixes, and removal of
dead cpu detection code.

The other fixes are trivial build and randconfig related fixes.

* tag 'omap-fixes-for-v3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Fix compile for CONFIG_TIDSPBRIDGE platform init code
  ARM: OMAP3: Fix omap3_l3_block_irq warning when CONFIG_BUG is not set
  ARM: OMAP: Fix MMC_OMAP build when only MMC_OMAP_HS is selected
  OMAP2+: UART: Add mechanism to probe uart pins and configure rx wakeup
  ARM: OMAP: Fix lis3lv02d accelerometer to use gpio_to_irq
  ARM: OMAP: SoC detection: remove unused cpu_is macros
  ARM: OMAP3: clock data: cleanup AM3[35]x SoC detection
  arm: omap3: am35x: Don't mark missing features as present
  ARM: OMAP3: PM: fix shared PRCM interrupts: leave disabled at boot
  ARM: OMAP2+: INTC: fix suspend abort, set IRQCHIP_SKIP_SET_WAKE
parents 8e56130d febe9e02

arch/arm/mach-omap2/board-rx51-peripherals.c

+4 −2
Original line number Diff line number Diff line
@@ -144,7 +144,6 @@ static struct lis3lv02d_platform_data rx51_lis3lv02d_data = { 
	.release_resources = lis302_release,

	.st_min_limits = {-32, 3, 3},

	.st_max_limits = {-3, 32, 32},

	.irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO),

};

#endif
@@ -1030,7 +1029,6 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = { 
	{

		I2C_BOARD_INFO("lis3lv02d", 0x1d),

		.platform_data = &rx51_lis3lv02d_data,

		.irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO),

	},

#endif

};
@@ -1056,6 +1054,10 @@ static int __init rx51_i2c_init(void) 
	omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);

	omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,

			      ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));

#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)

	rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);

	rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);

#endif

	omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,

			      ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));

	return 0;

arch/arm/mach-omap2/clock3xxx_data.c

+1 −1
Original line number Diff line number Diff line
@@ -3514,7 +3514,7 @@ int __init omap3xxx_clk_init(void) 
	struct omap_clk *c;

	u32 cpu_clkflg = 0;



	if (cpu_is_omap3517()) {

	if (soc_is_am35xx()) {

		cpu_mask = RATE_IN_34XX;

		cpu_clkflg = CK_AM35XX;

	} else if (cpu_is_omap3630()) {

arch/arm/mach-omap2/dsp.c

+3 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@ 


#include <linux/module.h>

#include <linux/platform_device.h>



#include <asm/memblock.h>



#include "cm2xxx_3xxx.h"

#include "prm2xxx_3xxx.h"

#ifdef CONFIG_BRIDGE_DVFS

arch/arm/mach-omap2/id.c

+11 −0
Original line number Diff line number Diff line
@@ -246,6 +246,17 @@ void __init omap3xxx_check_features(void) 


	omap_features |= OMAP3_HAS_SDRC;



	/*

	 * am35x fixups:

	 * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as

	 *   reserved and therefore return 0 when read.  Unfortunately,

	 *   OMAP3_CHECK_FEATURE() will interpret some of those zeroes to

	 *   mean that a feature is present even though it isn't so clear

	 *   the incorrectly set feature bits.

	 */

	if (soc_is_am35xx())

		omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP);



	/*

	 * TODO: Get additional info (where applicable)

	 *       e.g. Size of L2 cache.

arch/arm/mach-omap2/irq.c

+1 −0
Original line number Diff line number Diff line
@@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) 
	ct->chip.irq_ack = omap_mask_ack_irq;

	ct->chip.irq_mask = irq_gc_mask_disable_reg;

	ct->chip.irq_unmask = irq_gc_unmask_enable_reg;

	ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;



	ct->regs.enable = INTC_MIR_CLEAR0;

	ct->regs.disable = INTC_MIR_SET0;