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Commit f9bfccf1 authored by Russell King's avatar Russell King Committed by Russell King
Browse files

Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

parents 28d0325c 503dcbeb

arch/arm/mach-omap1/board-nokia770.c

+2 −1
Original line number Diff line number Diff line
@@ -36,7 +36,6 @@ 
#include <mach/hwa742.h>

#include <mach/lcd_mipid.h>

#include <mach/mmc.h>

#include <mach/usb.h>

#include <mach/clock.h>



#define ADS7846_PENDOWN_GPIO	15
@@ -205,9 +204,11 @@ static int nokia770_mmc_get_cover_state(struct device *dev, int slot) 
static struct omap_mmc_platform_data nokia770_mmc2_data = {

	.nr_slots                       = 1,

	.dma_mask			= 0xffffffff,

	.max_freq                       = 12000000,

	.slots[0]       = {

		.set_power		= nokia770_mmc_set_power,

		.get_cover_state	= nokia770_mmc_get_cover_state,

		.ocr_mask               = MMC_VDD_32_33|MMC_VDD_33_34,

		.name                   = "mmcblk",

	},

};

arch/arm/mach-omap1/mailbox.c

+1 −1
Original line number Diff line number Diff line
@@ -203,5 +203,5 @@ module_exit(omap1_mbox_exit); 


MODULE_LICENSE("GPL v2");

MODULE_DESCRIPTION("omap mailbox: omap1 architecture specific functions");

MODULE_AUTHOR("Hiroshi DOYU" <Hiroshi.DOYU@nokia.com>);

MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");

MODULE_ALIAS("platform:omap1-mailbox");

arch/arm/mach-omap2/board-rx51-peripherals.c

+1 −0
Original line number Diff line number Diff line
@@ -362,6 +362,7 @@ static struct omap_onenand_platform_data board_onenand_data = { 
	.gpio_irq	= 65,

	.parts		= onenand_partitions,

	.nr_parts	= ARRAY_SIZE(onenand_partitions),

	.flags		= ONENAND_SYNC_READWRITE,

};



static void __init board_onenand_init(void)

arch/arm/mach-omap2/gpmc-onenand.c

+19 −2
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ static struct platform_device gpmc_onenand_device = { 
static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)

{

	struct gpmc_timings t;

	u32 reg;

	int err;



	const int t_cer = 15;

	const int t_avdp = 12;
@@ -43,6 +45,11 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base) 
	const int t_wpl = 40;

	const int t_wph = 30;



	/* Ensure sync read and sync write are disabled */

	reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);

	reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;

	writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);



	memset(&t, 0, sizeof(t));

	t.sync_clk = 0;

	t.cs_on = 0;
@@ -74,7 +81,16 @@ static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base) 
			  GPMC_CONFIG1_DEVICESIZE_16 |

			  GPMC_CONFIG1_MUXADDDATA);



	return gpmc_cs_set_timings(cs, &t);

	err = gpmc_cs_set_timings(cs, &t);

	if (err)

		return err;



	/* Ensure sync read and sync write are disabled */

	reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);

	reg &= ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE;

	writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);



	return 0;

}



static void set_onenand_cfg(void __iomem *onenand_base, int latency,
@@ -124,7 +140,8 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, 
	} else if (cfg->flags & ONENAND_SYNC_READWRITE) {

		sync_read = 1;

		sync_write = 1;

	}

	} else

		return omap2_onenand_set_async_mode(cs, onenand_base);



	if (!freq) {

		/* Very first call freq is not known */

arch/arm/mach-omap2/id.c

+22 −0
Original line number Diff line number Diff line
@@ -48,6 +48,28 @@ int omap_chip_is(struct omap_chip_id oci) 
}

EXPORT_SYMBOL(omap_chip_is);



int omap_type(void)

{

	u32 val = 0;



	if (cpu_is_omap24xx())

		val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);

	else if (cpu_is_omap34xx())

		val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);

	else {

		pr_err("Cannot detect omap type!\n");

		goto out;

	}



	val &= OMAP2_DEVICETYPE_MASK;

	val >>= 8;



out:

	return val;

}

EXPORT_SYMBOL(omap_type);





/*----------------------------------------------------------------------------*/



#define OMAP_TAP_IDCODE		0x0204