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Commit f9afbd45 authored by Sanjay Lal's avatar Sanjay Lal Committed by Ralf Baechle
Browse files

MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs on a ASID wrap. 



Signed-off-by: default avatarSanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent f2e3656d

arch/mips/include/asm/mmu_context.h

+6 −0
Original line number Diff line number Diff line
@@ -106,15 +106,21 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) 
static inline void

get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)

{

	extern void kvm_local_flush_tlb_all(void);

	unsigned long asid = asid_cache(cpu);



	if (! ((asid += ASID_INC) & ASID_MASK) ) {

		if (cpu_has_vtag_icache)

			flush_icache_all();

#ifdef CONFIG_VIRTUALIZATION

		kvm_local_flush_tlb_all();      /* start new asid cycle */

#else

		local_flush_tlb_all();	/* start new asid cycle */

#endif

		if (!asid)		/* fix version if needed */

			asid = ASID_FIRST_VERSION;

	}



	cpu_context(cpu, mm) = asid_cache(cpu) = asid;

}