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Commit f9a3e047 authored by Alban Bedel's avatar Alban Bedel Committed by Ralf Baechle
Browse files

MIPS: ath79: Prepare moving the MISC driver to drivers/irqchip 



To prepare moving out of the arch directory rework the MISC
implementation to use irq domains instead of hard coded IRQ numbers.
Also remove the uses of the ath79_reset_base global pointer in the IRQ
methods.

Signed-off-by: default avatarAlban Bedel <albeu@free.fr>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Alexander Couzens <lynxis@fe80.eu>
Cc: Joel Porquet <joel@porquet.org>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11506/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent a797a0cf

arch/mips/ath79/irq.c

+28 −30
Original line number Diff line number Diff line
@@ -26,9 +26,13 @@ 
#include "common.h"

#include "machtypes.h"



static void __init ath79_misc_intc_domain_init(

	struct device_node *node, int irq);



static void ath79_misc_irq_handler(struct irq_desc *desc)

{

	void __iomem *base = ath79_reset_base;

	struct irq_domain *domain = irq_desc_get_handler_data(desc);

	void __iomem *base = domain->host_data;

	u32 pending;



	pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
@@ -42,15 +46,15 @@ static void ath79_misc_irq_handler(struct irq_desc *desc) 
	while (pending) {

		int bit = __ffs(pending);



		generic_handle_irq(ATH79_MISC_IRQ(bit));

		generic_handle_irq(irq_linear_revmap(domain, bit));

		pending &= ~BIT(bit);

	}

}



static void ar71xx_misc_irq_unmask(struct irq_data *d)

{

	unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;

	void __iomem *base = ath79_reset_base;

	void __iomem *base = irq_data_get_irq_chip_data(d);

	unsigned int irq = d->hwirq;

	u32 t;



	t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
@@ -62,8 +66,8 @@ static void ar71xx_misc_irq_unmask(struct irq_data *d) 


static void ar71xx_misc_irq_mask(struct irq_data *d)

{

	unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;

	void __iomem *base = ath79_reset_base;

	void __iomem *base = irq_data_get_irq_chip_data(d);

	unsigned int irq = d->hwirq;

	u32 t;



	t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
@@ -75,8 +79,8 @@ static void ar71xx_misc_irq_mask(struct irq_data *d) 


static void ar724x_misc_irq_ack(struct irq_data *d)

{

	unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;

	void __iomem *base = ath79_reset_base;

	void __iomem *base = irq_data_get_irq_chip_data(d);

	unsigned int irq = d->hwirq;

	u32 t;



	t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
@@ -94,12 +98,6 @@ static struct irq_chip ath79_misc_irq_chip = { 


static void __init ath79_misc_irq_init(void)

{

	void __iomem *base = ath79_reset_base;

	int i;



	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);

	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);



	if (soc_is_ar71xx() || soc_is_ar913x())

		ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;

	else if (soc_is_ar724x() ||
@@ -110,13 +108,7 @@ static void __init ath79_misc_irq_init(void) 
	else

		BUG();



	for (i = ATH79_MISC_IRQ_BASE;

	     i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) {

		irq_set_chip_and_handler(i, &ath79_misc_irq_chip,

					 handle_level_irq);

	}



	irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler);

	ath79_misc_intc_domain_init(NULL, ATH79_CPU_IRQ(6));

}



static void ar934x_ip2_irq_dispatch(struct irq_desc *desc)
@@ -259,6 +251,7 @@ asmlinkage void plat_irq_dispatch(void) 
static int misc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)

{

	irq_set_chip_and_handler(irq, &ath79_misc_irq_chip, handle_level_irq);

	irq_set_chip_data(irq, d->host_data);

	return 0;

}
@@ -267,19 +260,14 @@ static const struct irq_domain_ops misc_irq_domain_ops = { 
	.map = misc_map,

};



static int __init ath79_misc_intc_of_init(

	struct device_node *node, struct device_node *parent)

static void __init ath79_misc_intc_domain_init(

	struct device_node *node, int irq)

{

	void __iomem *base = ath79_reset_base;

	struct irq_domain *domain;

	int irq;



	irq = irq_of_parse_and_map(node, 0);

	if (!irq)

		panic("Failed to get MISC IRQ");



	domain = irq_domain_add_legacy(node, ATH79_MISC_IRQ_COUNT,

			ATH79_MISC_IRQ_BASE, 0, &misc_irq_domain_ops, NULL);

			ATH79_MISC_IRQ_BASE, 0, &misc_irq_domain_ops, base);

	if (!domain)

		panic("Failed to add MISC irqdomain");
@@ -287,9 +275,19 @@ static int __init ath79_misc_intc_of_init( 
	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);

	__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);



	irq_set_chained_handler_and_data(irq, ath79_misc_irq_handler, domain);

}



	irq_set_chained_handler(irq, ath79_misc_irq_handler);

static int __init ath79_misc_intc_of_init(

	struct device_node *node, struct device_node *parent)

{

	int irq;



	irq = irq_of_parse_and_map(node, 0);

	if (!irq)

		panic("Failed to get MISC IRQ");



	ath79_misc_intc_domain_init(node, irq);

	return 0;

}