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Commit f975ca46 authored by Nicolin Chen's avatar Nicolin Chen Committed by Mark Brown
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ASoC: fsl_esai: Bypass divider settings if clock requirement is not changed



We don't need to change those dividers if bclk and mclk remains the same
directions and values.

Signed-off-by: default avatarNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 3e185238
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