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Commit f9350efd authored by Borislav Petkov's avatar Borislav Petkov
Browse files

EDAC, AMD: decode load store MCEs



See Fam10h BKDG (31116, rev. 3.28), Table 100.

Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
parent 56cad2d6
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+25 −0
Original line number Diff line number Diff line
@@ -270,6 +270,27 @@ static void amd_decode_bu_mce(u64 mc2_status)
	pr_warning("Corrupted BU MCE info?\n");
}

static void amd_decode_ls_mce(u64 mc3_status)
{
	u32 ec  = mc3_status & 0xffff;
	u32 xec = (mc3_status >> 16) & 0xf;

	pr_emerg(" Load Store Error");

	if (xec == 0x0) {
		u8 rrrr = (ec >> 4) & 0xf;

		if (!BUS_ERROR(ec) || (rrrr != 0x3 && rrrr != 0x4))
			goto wrong_ls_mce;

		pr_cont(" during %s.\n", RRRR_MSG(ec));
	}
	return;

wrong_ls_mce:
	pr_warning("Corrupted LS MCE info?\n");
}

void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
{
	u32 ec  = ERROR_CODE(regs->nbsl);
@@ -366,6 +387,10 @@ void decode_mce(struct mce *m)
		amd_decode_bu_mce(m->status);
		break;

	case 3:
		amd_decode_ls_mce(m->status);
		break;

	case 4:
		regs.nbsl  = (u32) m->status;
		regs.nbsh  = (u32)(m->status >> 32);