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Commit f9317a40 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
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[BNX2]: Disable MSI on 5706 if AMD 8132 bridge is present. 



MSI is defined to be 32-bit write.  The 5706 does 64-bit MSI writes
with byte enables disabled on the unused 32-bit word.  This is legal
but causes problems on the AMD 8132 which will eventually stop
responding after a while.

Without this patch, the MSI test done by the driver during open will
pass, but MSI will eventually stop working after a few MSIs are
written by the device.

AMD believes this incompatibility is unique to the 5706, and
prefers to locally disable MSI rather than globally disabling it
using pci_msi_quirk.

Update version to 1.4.45.

Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 95d4e6be

drivers/net/bnx2.c

+30 −2
Original line number Diff line number Diff line
@@ -56,8 +56,8 @@ 


#define DRV_MODULE_NAME		"bnx2"

#define PFX DRV_MODULE_NAME	": "

#define DRV_MODULE_VERSION	"1.4.44"

#define DRV_MODULE_RELDATE	"August 10, 2006"

#define DRV_MODULE_VERSION	"1.4.45"

#define DRV_MODULE_RELDATE	"September 29, 2006"



#define RUN_AT(x) (jiffies + (x))
@@ -5805,6 +5805,34 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) 
		bp->cmd_ticks_int = bp->cmd_ticks;

	}



	/* Disable MSI on 5706 if AMD 8132 bridge is found.

	 *

	 * MSI is defined to be 32-bit write.  The 5706 does 64-bit MSI writes

	 * with byte enables disabled on the unused 32-bit word.  This is legal

	 * but causes problems on the AMD 8132 which will eventually stop

	 * responding after a while.

	 *

	 * AMD believes this incompatibility is unique to the 5706, and

	 * prefers to locally disable MSI rather than globally disabling it

	 * using pci_msi_quirk.

	 */

	if (CHIP_NUM(bp) == CHIP_NUM_5706 && disable_msi == 0) {

		struct pci_dev *amd_8132 = NULL;



		while ((amd_8132 = pci_get_device(PCI_VENDOR_ID_AMD,

						  PCI_DEVICE_ID_AMD_8132_BRIDGE,

						  amd_8132))) {

			u8 rev;



			pci_read_config_byte(amd_8132, PCI_REVISION_ID, &rev);

			if (rev >= 0x10 && rev <= 0x13) {

				disable_msi = 1;

				pci_dev_put(amd_8132);

				break;

			}

		}

	}



	bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;

	bp->req_line_speed = 0;

	if (bp->phy_flags & PHY_SERDES_FLAG) {

include/linux/pci_ids.h

+1 −0
Original line number Diff line number Diff line
@@ -507,6 +507,7 @@ 
#define PCI_DEVICE_ID_AMD_8151_0	0x7454

#define PCI_DEVICE_ID_AMD_8131_BRIDGE	0x7450

#define PCI_DEVICE_ID_AMD_8131_APIC	0x7451

#define PCI_DEVICE_ID_AMD_8132_BRIDGE	0x7458

#define PCI_DEVICE_ID_AMD_CS5536_ISA    0x2090

#define PCI_DEVICE_ID_AMD_CS5536_FLASH  0x2091

#define PCI_DEVICE_ID_AMD_CS5536_AUDIO  0x2093