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Commit f6624888 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'linux-3.19' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes 

    - Fix BUG() on !SMP builds
    - Fix for OOPS on pre-NV50 that snuck into -next
    - MCP7[789A] hang fix where firmware hasn't already setup NISO pollers
    - NV4x IGP MSI disable, it doesn't appear to work correctly
    - Add GK208B to recognised boards (no code change aside from adding
    chipset recognition)

* 'linux-3.19' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau/nouveau: Do not BUG_ON(!spin_is_locked()) on UP
  drm/nv4c/mc: disable msi
  drm/nouveau/fb/ram/mcp77: enable NISO poller
  drm/nouveau/fb/ram/mcp77: use carveout reg to determine size
  drm/nouveau/fb/ram/mcp77: subclass nouveau_ram
  drm/nouveau: wake up the card if necessary during gem callbacks
  drm/nouveau/device: Add support for GK208B, resolves bug 86935
  drm/nouveau: fix missing return statement in nouveau_ttm_tt_unpopulate
  drm/nouveau/bios: fix oops on pre-nv50 chipsets
parents 2f6bd4da ff4c0d52

drivers/gpu/drm/nouveau/core/core/event.c

+2 −2
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 
void

nvkm_event_put(struct nvkm_event *event, u32 types, int index)

{

	BUG_ON(!spin_is_locked(&event->refs_lock));

	assert_spin_locked(&event->refs_lock);

	while (types) {

		int type = __ffs(types); types &= ~(1 << type);

		if (--event->refs[index * event->types_nr + type] == 0) {
@@ -39,7 +39,7 @@ nvkm_event_put(struct nvkm_event *event, u32 types, int index) 
void

nvkm_event_get(struct nvkm_event *event, u32 types, int index)

{

	BUG_ON(!spin_is_locked(&event->refs_lock));

	assert_spin_locked(&event->refs_lock);

	while (types) {

		int type = __ffs(types); types &= ~(1 << type);

		if (++event->refs[index * event->types_nr + type] == 1) {

drivers/gpu/drm/nouveau/core/core/notify.c

+1 −1
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ nvkm_notify_send(struct nvkm_notify *notify, void *data, u32 size) 
	struct nvkm_event *event = notify->event;

	unsigned long flags;



	BUG_ON(!spin_is_locked(&event->list_lock));

	assert_spin_locked(&event->list_lock);

	BUG_ON(size != notify->size);



	spin_lock_irqsave(&event->refs_lock, flags);

drivers/gpu/drm/nouveau/core/engine/device/nve0.c

+33 −0
Original line number Diff line number Diff line
@@ -249,6 +249,39 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

		device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;

		break;

	case 0x106:

		device->cname = "GK208B";

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

		device->oclass[NVDEV_SUBDEV_GPIO   ] =  nve0_gpio_oclass;

		device->oclass[NVDEV_SUBDEV_I2C    ] =  nve0_i2c_oclass;

		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;

		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nve0_clock_oclass;

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nvd0_therm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_IBUS   ] = &nve0_ibus_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_VM     ] = &nvc0_vmmgr_oclass;

		device->oclass[NVDEV_SUBDEV_BAR    ] = &nvc0_bar_oclass;

		device->oclass[NVDEV_SUBDEV_PWR    ] =  nv108_pwr_oclass;

		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nv108_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nv108_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;

		device->oclass[NVDEV_ENGINE_COPY2  ] = &nve0_copy2_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nve0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nve0_vp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

		break;

	case 0x108:

		device->cname = "GK208";

		device->oclass[NVDEV_SUBDEV_VBIOS  ] = &nouveau_bios_oclass;

drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c

+4 −2
Original line number Diff line number Diff line
@@ -44,9 +44,11 @@ static void 
pramin_fini(void *data)

{

	struct priv *priv = data;

	if (priv) {

		nv_wr32(priv->bios, 0x001700, priv->bar0);

		kfree(priv);

	}

}



static void *

pramin_init(struct nouveau_bios *bios, const char *name)

drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c

+51 −14
Original line number Diff line number Diff line
@@ -24,34 +24,71 @@ 


#include "nv50.h"



struct nvaa_ram_priv {

	struct nouveau_ram base;

	u64 poller_base;

};



static int

nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,

	      struct nouveau_oclass *oclass, void *data, u32 datasize,

	      struct nouveau_object **pobject)

{

	const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */

	const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */

	u32 rsvd_head = ( 256 * 1024); /* vga memory */

	u32 rsvd_tail = (1024 * 1024); /* vbios etc */

	struct nouveau_fb *pfb = nouveau_fb(parent);

	struct nouveau_ram *ram;

	struct nvaa_ram_priv *priv;

	int ret;



	ret = nouveau_ram_create(parent, engine, oclass, &ram);

	*pobject = nv_object(ram);

	ret = nouveau_ram_create(parent, engine, oclass, &priv);

	*pobject = nv_object(priv);

	if (ret)

		return ret;



	priv->base.type   = NV_MEM_TYPE_STOLEN;

	priv->base.stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;

	priv->base.size   = (u64)nv_rd32(pfb, 0x100e14) << 12;



	rsvd_tail += 0x1000;

	priv->poller_base = priv->base.size - rsvd_tail;



	ret = nouveau_mm_init(&pfb->vram, rsvd_head >> 12,

			      (priv->base.size  - (rsvd_head + rsvd_tail)) >> 12,

			      1);

	if (ret)

		return ret;



	ram->size = nv_rd32(pfb, 0x10020c);

	ram->size = (ram->size & 0xffffff00) | ((ram->size & 0x000000ff) << 32);

	priv->base.get = nv50_ram_get;

	priv->base.put = nv50_ram_put;

	return 0;

}



static int

nvaa_ram_init(struct nouveau_object *object)

{

	struct nouveau_fb *pfb = nouveau_fb(object);

	struct nvaa_ram_priv *priv = (void *)object;

	int ret;

	u64 dniso, hostnb, flush;



	ret = nouveau_mm_init(&pfb->vram, rsvd_head, (ram->size >> 12) -

			      (rsvd_head + rsvd_tail), 1);

	ret = nouveau_ram_init(&priv->base);

	if (ret)

		return ret;



	ram->type   = NV_MEM_TYPE_STOLEN;

	ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;

	ram->get = nv50_ram_get;

	ram->put = nv50_ram_put;

	dniso  = ((priv->base.size - (priv->poller_base + 0x00)) >> 5) - 1;

	hostnb = ((priv->base.size - (priv->poller_base + 0x20)) >> 5) - 1;

	flush  = ((priv->base.size - (priv->poller_base + 0x40)) >> 5) - 1;



	/* Enable NISO poller for various clients and set their associated

	 * read address, only for MCP77/78 and MCP79/7A. (fd#25701)

	 */

	nv_wr32(pfb, 0x100c18, dniso);

	nv_mask(pfb, 0x100c14, 0x00000000, 0x00000001);

	nv_wr32(pfb, 0x100c1c, hostnb);

	nv_mask(pfb, 0x100c14, 0x00000000, 0x00000002);

	nv_wr32(pfb, 0x100c24, flush);

	nv_mask(pfb, 0x100c14, 0x00000000, 0x00010000);



	return 0;

}
@@ -60,7 +97,7 @@ nvaa_ram_oclass = { 
	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nvaa_ram_ctor,

		.dtor = _nouveau_ram_dtor,

		.init = _nouveau_ram_init,

		.init = nvaa_ram_init,

		.fini = _nouveau_ram_fini,

	},

};