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Commit f6496479 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: add some loop timeouts in pageflip code 

Avoid infinite loops waiting for surface updates if a GPU
reset happens while waiting for a page flip.

See:
https://bugs.freedesktop.org/show_bug.cgi?id=43191



Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Reviewed-by: default avatarMario Kleiner <mario.kleiner@tuebingen.mpg.de>
Tested-by: default avatarSimon Farnsworth <simon.farnsworth@onelan.co.uk>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 4f3e0b1d

drivers/gpu/drm/radeon/evergreen.c

+6 −1
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
{

	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];

	u32 tmp = RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset);

	int i;



	/* Lock the graphics update lock */

	tmp |= EVERGREEN_GRPH_UPDATE_LOCK;
@@ -99,7 +100,11 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
	       (u32)crtc_base);



	/* Wait for update_pending to go high. */

	while (!(RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING));

	for (i = 0; i < rdev->usec_timeout; i++) {

		if (RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PENDING)

			break;

		udelay(1);

	}

	DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");



	/* Unlock the lock, so double-buffering can take place inside vblank */

drivers/gpu/drm/radeon/r100.c

+6 −1
Original line number Diff line number Diff line
@@ -187,13 +187,18 @@ u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
{

	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];

	u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;

	int i;



	/* Lock the graphics update lock */

	/* update the scanout addresses */

	WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);



	/* Wait for update_pending to go high. */

	while (!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET));

	for (i = 0; i < rdev->usec_timeout; i++) {

		if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET)

			break;

		udelay(1);

	}

	DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");



	/* Unlock the lock, so double-buffering can take place inside vblank */

drivers/gpu/drm/radeon/rs600.c

+6 −1
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
{

	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];

	u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset);

	int i;



	/* Lock the graphics update lock */

	tmp |= AVIVO_D1GRPH_UPDATE_LOCK;
@@ -74,7 +75,11 @@ u32 rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
	       (u32)crtc_base);



	/* Wait for update_pending to go high. */

	while (!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING));

	for (i = 0; i < rdev->usec_timeout; i++) {

		if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING)

			break;

		udelay(1);

	}

	DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");



	/* Unlock the lock, so double-buffering can take place inside vblank */

drivers/gpu/drm/radeon/rv770.c

+6 −1
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
{

	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];

	u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset);

	int i;



	/* Lock the graphics update lock */

	tmp |= AVIVO_D1GRPH_UPDATE_LOCK;
@@ -66,7 +67,11 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) 
	       (u32)crtc_base);



	/* Wait for update_pending to go high. */

	while (!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING));

	for (i = 0; i < rdev->usec_timeout; i++) {

		if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING)

			break;

		udelay(1);

	}

	DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");



	/* Unlock the lock, so double-buffering can take place inside vblank */